- Independent Direct Memory Access (IDMA) Controller

- Interrupt controller with two modes of operation

- Parallel I/O ports, some with interrupt capability

- On-Chip 1152-bytes of dual-port RAM

- Three timers, with a software watchdog timer

- Four programmable chip-select lines with wait-state logic

- Programmable address mapping of dual-port RAM and

IMP registers

- On-Chip clock generator with an output clock signal

- System control

• Bus arbitration logic with low interrupt latency support

• System control register

• Hardware watchdog for monitoring bus activity

• Low power (Standby) modes

• Disable CPU logic (M68000)

• Freeze control for debugging selected on-chip peripherals

• DRAM refresh controller

s

CP Including:

- Main controller (RISC Processor)

- Three full-duplex Serial Communication/Controllers

with the following protocols:

• HDLC/SDLC

• Bisync

• UART

• DDCMP

• Totally Transparent

• V.110

- Six serial DMA channels dedicated to the three SOCs

- Capability to send/receive up to eight buffers/frames

without M68000 core intervention

- Flexible physical interface accessible by SCCs for Inter-

chip Digital Link (IDL), General Circuit Interface (GCI).

- Pulse Code Modulation (PCM), and Non-multiplexed

Serial Interface (NMSI) Operation.

- Serial Communication Port (SCP) for synchronous com-

munication.

- Two Serial Management Controllers (SMCs) for IDL and GCI Channel.

Contact Information

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Motorola offers user’s manuals,

application notes and sample

code for all of its communications

processors. In addition, local support

for these products is also provided.

This information can be found at:

http://motorola.com/netcomm/

s

For all other inquiries about Motorola

products, please contact the Motorola

Customer Response Center at:

Phone: 800-521-6274

MC68000/MC68008 CORE

MC68000 BUS

Peripheral Bus

SMC (2)

SCC1

SCC2

SCC3

SCP

System Integration Block

Communications Processor

Main

Controller

(RISC)

Interrupt

Controller

Bus

Arbiter

1152 Bytes

Dual-Port

Static RAM

Chip-Select

And Wait-

State Logic

System

Control

Clock

Generator

3 Timers

1 Channel

IDMA

DRAM

Refresh

Controller

Parallel I/O

MC68000/MC68008 CORE

On-Chip Peripherals Bus Interface Unit

6 Channels

SDMA

Serial Channels Physical Interface

I/O Ports And Pin Assignments

MC68302 Derivatives

MC68LC302

- Static EC000 Core

- On-Chip PLL

- Low Power Modes Down in

µA Range

- Two SCC's

- 100-Pin TQFP

MC68EN302

- Full Ethernet 802.3 Compliant Controller

Independent of SCC’s

- Full DRAM Controller

- Parity Support

- Dynamic Bus Sizing

- Full Superset of 68302

- 144-Pin TQFP

MC68QH302

- 68000 Core Processor

- System Integration Block

- RISC Communications Processor

- Two SCC’s

- One Dual Channel SCC

- Pin Compatible with 68302

- 144-Pin TQFP

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com