OPA690 datasheet(15/40 Pages) TI

15 / 40 page

THS4221, THS4225

THS4222, THS4226

SLOS399G − AUGUST 2002 − REVISED JANUARY 2004

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In the inverting configuration, some key design

considerations must be noted. One is that the gain resistor

(Rg) becomes part of the signal channel input impedance.

If the input impedance matching is desired (which is

beneficial whenever the signal is coupled through a cable,

twisted pair, long PC board trace, or other transmission

line conductors), Rg may be set equal to the required

termination value and Rf adjusted to give the desired gain.

However, care must be taken when dealing with low

inverting gains, as the resultant feedback resistor value

can present a significant load to the amplifier output. For

an inverting gain of 2, setting Rg to 49.9 Ω for input

matching eliminates the need for RM but requires a 100-Ω

feedback resistor. This has an advantage of the noise gain

becoming equal to 2 for a 50-Ω source impedance—the

same as the noninverting circuit in Figure 29. However, the

amplifier output now sees the 100-Ω feedback resistor in

parallel with the external load. To eliminate this excessive

loading, it is preferable to increase both Rg and Rf, values,

as shown in Figure 30, and then achieve the input

matching impedance with a third resistor (RM) to ground.

The total input impedance becomes the parallel

combination of Rg and RM.

The last major consideration to discuss in inverting

amplifier design is setting the bias current cancellation

resistor on the noninverting input. If the resistance is set

equal to the total dc resistance looking out of the inverting

terminal, the output dc error, due to the input bias currents,

is reduced to (input offset current) multiplied by Rf in

Figure 30, the dc source impedance looking out of the

inverting terminal is 1.3 kΩ || (1.3 kΩ + 25.6 Ω) = 649 Ω.

To reduce the additional high-frequency noise introduced

by the resistor at the noninverting input, and power-supply

feedback, RT is bypassed with a capacitor to ground.

SINGLE SUPPLY OPERATION

The THS4222 is designed to operate from a single 3-V to

15-V power supply. When operating from a single power

supply, care must be taken to ensure the input signal and

amplifier are biased appropriately to allow for the

maximum output voltage swing. The circuits shown in

Figure 31 demonstrate methods to configure an amplifier

in a manner conducive for single supply operation.

THS4222

49.9 Ω

50 Ω Source

+VS

1.3 kΩ

+VS

THS4222

1.3 kΩ

50 Ω Source

1.3 kΩ

52.3 Ω

499 Ω

+VS

Figure 31. DC-Coupled Single Supply Operation

Saving Power With Power-Down Functionality

and Setting Threshold Levels With the Reference

The THS4225 and THS4226 feature a power-down pin

(PD) which lowers the quiescent current from 14 mA/ch

down to 700 µA/ch, ideal for reducing system power.

The power-down pin of the amplifiers defaults to the

positive supply voltage in the absence of an applied

voltage, putting the amplifier in the power-on mode of

operation. To turn off the amplifier in an effort to conserve

power, the power-down pin can be driven towards the

negative rail. The threshold voltages for power-on and

power-down are relative to the supply rails and given in the

specification tables. Above the Enable Threshold Voltage,

the device is on. Below the Disable Threshold Voltage, the

device is off. Behavior in between these threshold voltages

is not specified.

Note that this power-down functionality is just that; the

amplifier consumes less power in power-down mode. The

power-down mode is not intended to provide a high-

impedance output. In other words, the power-down

functionality is not intended to allow use as a 3-state bus

driver. When in power-down mode, the impedance looking

back into the output of the amplifier is dominated by the

feedback and gain setting resistors, but the output

impedance of the device itself varies depending on the

voltage applied to the outputs.

The time delays associated with turning the device on and

off are specified as the time it takes for the amplifier to

reach 50% of the nominal quiescent current. The time

delays are on the order of microseconds because the

amplifier moves in and out of the linear mode of operation

in these transitions.

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