AD7396/AD7397

–9–

REV. 0

DIGITAL INPUT FREQUENCY – Hz

1400

1k

10M

10k

100k

1M

1200

1000

800

600

400

200

0

AD7396

D

C

B

A

Frequency

OPERATION

The AD7396 and AD7397 are a set of pin compatible, 12-bit

and 10-bit digital-to-analog converters. These single-supply

operation devices consume less than 200

µA of current while

operating from power supplies in the +2.7 V to +5.5 V range,

making them ideal for battery operated applications. They

contain a voltage-switched, 12-bit/10-bit, digital-to-analog

converter, rail-to-rail output op amps, and a parallel-input

DAC register. The external reference input has constant

2.5 M

Ω input resistance independent of the digital code

setting of the DAC. In addition, the reference input can be tied

consists of 12 data bits, DB0–DB11, for the AD7396, 10 data

bits, DB0–DB9, for the AD7397, and a

CS write strobe. An RS

pin is available to reset the DAC register to zero scale. This

function is useful for power-on reset or system failure recovery

to a known state. Additional power savings are accomplished by

activating the

SHDN pin resulting in a 1.5

µA maximum con-

sumption sleep mode. As long as the supply voltage, remains

data will be retained in the DAC and input register to supply

the DAC output when the part is taken out of shutdown.

DACA

REGISTER

12

INPUTA

REGISTER

DACB

REGISTER

12

INPUTB

REGISTER

AD7396

12-BIT

DACA

12-BIT

DACB

1

DATA

LDA

CS

A/

B

DGND

RS

SHDN

AGND

LDB

12

Figure 25. Functional Block Diagram

D/A CONVERTER SECTION

The voltage switched R-2R DAC generates an output voltage

dependent on the external reference voltage connected to the

REF pin according to the following equation:

(1)

where D is the decimal data word loaded into the DAC register,

and N is the number of bits of DAC resolution. In the case of

the 10-bit AD7397 using a 2.5 V reference, Equation 1 simpli-

fies to:

× D/1024

(2)

1.25 V for D = 512; full-scale voltage is 2.497 V. The LSB step

size is = 2.5

× 1/1024 = 0.0024 V.

For the 12-bit AD7396 operating from a 5.0 V reference equa-

tion [1] becomes:

× D/4096

(3)

Using Equation 3, the AD7396 provides a nominal midscale

voltage of 2.50 V for D = 2048, and a full-scale output of

4.998 V. The LSB step size is = 5.0

× 1/4096 = 0.0012 V.

AMPLIFIER SECTION

The internal DAC’s output is buffered by a low power con-

sumption precision amplifier. The op amp has a 60

µs typical

settling time to 0.1% of full scale. There are slight differences in

settling time for negative slewing signals versus positive. Also,

negative transition settling time to within the last 6 LSBs of zero

volts has an extended settling time. The rail-to-rail output stage

of this amplifier has been designed to provide precision perfor-

mance while operating near either power supply. Figure 26

shows an equivalent output schematic of the rail-to-rail-ampli-

fier with its N-channel pull-down FETs that will pull an output

load directly to GND. The output sourcing current is provided

by a P-channel pull-up device that can source current to GND

terminated loads.

P-ch

N-ch

AGND

Figure 26. Equivalent Analog Output Circuit

FREQUENCY – Hz

80

1

10k

10

100

1k

70

60

50

40

30

20

0

10

Figure 23. PSRR vs. Frequency

HOURS OF OPERATION AT +150 C

1.0

0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

100

200

300

400

500

600

AD7396

SAMPLE SIZE = 77

Figure 24. Long-Term Drift Acceler-

ated by Burn-In