REV. A

a

ADP3331

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FUNCTIONAL BLOCK DIAGRAM

THERMAL

PROTECTION

CC

IN

ADP3331

OUT

GND

Q1

SD

BAND GAP

REF

DRIVER

ERR

FB

Q2

FEATURES

High Accuracy over Line and Load:

0.7% @ 25 C,

1.4% over Temperature

Ultralow Dropout Voltage: 140 mV (Typ) @ 200 mA

Can Be Used as a High Current (>1 A) LDO

Controller

Requires Only C

F for Stability

anyCAP = Stable with Any Type of Capacitor

(Including MLCC)

Current and Thermal Limiting

Low Noise

Low Shutdown Current: 10 nA Typical

2.6 V to 12 V Supply Range

1.5 V to 11.75 V Output Range

–40 C to +85 C Ambient Temperature Range

Ultrasmall Thermally Enhanced Chip-on-Lead™

SOT-23-6 Lead Package

APPLICATIONS

Cellular Telephones

Notebook, Palmtop Computers

Battery-Powered Systems

PCMCIA Regulators

Bar Code Scanners

Camcorders, Cameras

GENERAL DESCRIPTION

The ADP3331 is a member of the ADP330x family of precision

low dropout anyCAP voltage regulators. The ADP3331 operates

with an input voltage range of 2.6 V to 12 V and delivers a load

current up to 200 mA. The ADP3331 stands out from the

conventional LDOs with a novel architecture and an enhanced

process that enables it to offer performance advantages and higher

output current than its competition. Its patented design requires

only a 0.47

mF output capacitor for stability. This device is insensi-

tive to capacitor equivalent series resistance (ESR), and is stable

with any good quality capacitor, including ceramic (MLCC) types

for space restricted applications. The ADP3331 achieves excep-

tional accuracy of

±0.7% at room temperature and ±1.4% overall

accuracy over temperature, line, and load variations. The drop-

out voltage of the ADP3331 is only 140 mV (typical) at 200 mA.

This device also includes a safety current limit, thermal over-

load protection, and a shutdown feature. In shutdown mode, the

ground current is reduced to less than 2

mA. The ADP3331 has

ultralow quiescent current 34

mA (typical) in light load situations.

The SOT-23-6 package has been thermally enhanced using

Analog Device’s proprietary Chip-on-Lead feature to maxi-

mize power dissipation.

+

ADP3331

FB

OUT

ERR

ON

OFF

SD

GND

IN

C2

0.47 F

C1

0.47 F

+

R3

330k

R1

R2

64

Figure 1. Typical Application Circuit