ADS4229IRGC25 datasheet(39/67 Pages) TI1

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−60

−55

−50

−45

−40

−35

−30

−25

−20

−15

−10

−5

100

150

200

250

300

Frequency of Input Common−Mode Signal (MHz)

Input Frequency = 40 MHz

50 mVPP Signal Superimposed on VCM

66.5

67.5

68.5

69.5

70.5

71.5

Input Clock Duty Cycle (%)

SNR

THD

Input Frequency = 10 MHz

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

68.5

69.5

70.5

71.5

72.5

Differential Clock Amplitude (VPP)

SFDR

SNR

Input Frequency = 40 MHz

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

66.5

67.5

68.5

69.5

70.5

Differential Clock Amplitudes (VPP)

SFDR

SNR

Input Frequency = 150 MHz

ADS4229

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SBAS550B – JUNE 2011 – REVISED AUGUST 2012

TYPICAL CHARACTERISTICS: ADS4229 (continued)

At TA = +25°C, AVDD = 1.8 V, DRVDD = 1.8 V, maximum rated sampling frequency, sine wave input clock, 1.5 VPP

differential clock amplitude, 50% clock duty cycle, –1-dBFS differential analog input, High-Performance Mode enabled, 0-dB

gain, DDR LVDS output interface, and 32k point FFT, unless otherwise noted.

PERFORMANCE vs INPUT CLOCK AMPLITUDE

Figure 28.

Figure 29.

PERFORMANCE vs INPUT CLOCK DUTY CYCLE

CMRR vs TEST SIGNAL FREQUENCY

Figure 30.

Figure 31.

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