48GA004 datasheet(207/268 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS39881D-page 207

PIC24FJ64GA004 FAMILY

24.0

SPECIAL FEATURES

PIC24FJ64GA004 family devices include several

features intended to maximize application flexibility and

reliability, and minimize cost through elimination of

external components. These are:

• Flexible Configuration

• Watchdog Timer (WDT)

• Code Protection

• JTAG Boundary Scan Interface

• In-Circuit Serial Programming

• In-Circuit Emulation

24.1

Configuration Bits

The Configuration bits can be programmed (read as ‘0’),

or left unprogrammed (read as ‘1’), to select various

device configurations. These bits are mapped starting at

program memory location F80000h. A complete list is

shown in Table 24-1. A detailed explanation of the vari-

ous bit functions is provided in Register 24-1 through

Note that address F80000h is beyond the user program

memory space. In fact, it belongs to the configuration

memory space (800000h-FFFFFFh) which can only be

accessed using table reads and table writes.

24.1.1

CONSIDERATIONS FOR

CONFIGURING PIC24FJ64GA004

FAMILY DEVICES

In PIC24FJ64GA004 family devices, the configuration

bytes are implemented as volatile memory. This means

that configuration data must be programmed each time

the device is powered up. Configuration data is stored

in the two words at the top of the on-chip program

memory space, known as the Flash Configuration

Words. Their specific locations are shown in

Table 24-1. These are packed representations of the

actual device Configuration bits, whose actual

locations are distributed among five locations in config-

uration space. The configuration data is automatically

loaded from the Flash Configuration Words to the

proper Configuration registers during device Resets.

TABLE 24-1:

FLASH CONFIGURATION

WORD LOCATIONS FOR

PIC24FJ64GA004 FAMILY

DEVICES

When creating applications for these devices, users

should always specifically allocate the location of the

Flash Configuration Word for configuration data. This is

to make certain that program code is not stored in this

address when the code is compiled.

The Configuration bits are reloaded from the Flash

Configuration Word on any device Reset.

The upper byte of both Flash Configuration Words in

program memory should always be ‘1111 1111’. This

makes them appear to be NOP instructions in the

remote event that their locations are ever executed by

accident. Since Configuration bits are not implemented

in the corresponding locations, writing ‘1’s to these

locations has no effect on device operation.

Note:

This data sheet summarizes the features

of this group of PIC24F devices. It is not

intended to be a comprehensive reference

source. For more information, refer to the

following sections of the “PIC24F Family

Reference Manual”

• Section 9. “Watchdog Timer (WDT)”

(DS39697)

• Section 32. “High-Level Device

Integration”

(DS39719)

• Section 33. “Programming and

Diagnostics”

(DS39716)

Note:

Configuration data is reloaded on all types

of device Resets.

Device

Configuration Word

Addresses

PIC24FJ16GA

002BFEh

002BFCh

PIC24FJ32GA

0057FEh

0057FCh

PIC24FJ48GA

0083FEh

0083FCh

PIC24FJ64GA

00ABFEh

00ABFCh

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