LM77 datasheet(12/23 Pages) TI1

12 / 23 page

LM77

SNIS103F – JUNE 1999 – REVISED MARCH 2013

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D0: Shutdown - When set to 1 the LM77 goes to low power shutdown mode. Power up default of “0”.

D1: Interrupt mode - 0 is Comparator Interrupt mode, 1 is Event Interrupt mode. Power up default of “0”.

D2, D3: T_CRIT_A and INT Polarity - 0 is active low, 1 is active high. Outputs are open-drain. Power up default

of “0”

D4: Fault Queue - When set to 1 the Fault Queue is enabled, see FAULT QUEUE. Power up default of “0”.

D5–D7: These bits are used for production testing and must be kept zero for normal operation.

Table 4. THYST, TLOW, THIGH AND T_CRIT_A REGISTERS (Read/Write):

D15

D14

D13

D12

D11

D10

Sign

MSB

Bit7

Bit6

Bit5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

D0–D2: Undefined

D3–D15: THYST, TLOW, THIGH or T_CRIT Trip Temperature Data. Power up default is TLOW = 10°C, THIGH = 64°C,

T_CRIT = 80°C, THYST = 2°C.

THYST is subtracted from THIGH, and T_CRIT, and added to TLOW.

Avoid programming setpoints so close that their hysteresis values overlap. See TEMPERATURE COMPARISON.

TEST CIRCUIT DIAGRAMS

I2C Timing Diagrams

Figure 10. Typical 2-Byte Read From Preset Pointer Location Such as Temp or Comparison Registers

Figure 11. Typical Pointer Set Followed by Immediate Read for 2-Byte Register such as Temp or

Comparison Registers

Figure 12. Typical 1-Byte Read from Configuration Register with Preset Pointer

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