LTC1778IGN datasheet(19/24 Pages) LINER

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LTC1778/LTC1778-1

1778fb

APPLICATIO S I FOR ATIO

Figure 10. LTC1778 Layout Diagram

CC2

BOLD LINES INDICATE HIGH CURRENT PATHS

CC1

CSS

RON

1778 F10

RUN/SS

PGOOD

VRNG

FCB

ITH

SGND

ION

VFB

BOOST

PGND

INTVCC

VIN

EXTVCC

CVCC

COUT

CIN

VIN

VOUT

–

LTC1778

When laying out a printed circuit board, without a ground

plane, use the following checklist to ensure proper opera-

tion of the controller. These items are also illustrated in

Figure 10.

• Segregate the signal and power grounds. All small

signal components should return to the SGND pin at

one point which is then tied to the PGND pin close to the

source of M2.

• Place M2 as close to the controller as possible, keeping

the PGND, BG and SW traces short.

• Connect the input capacitor(s) CIN close to the power

MOSFETs. This capacitor carries the MOSFET AC

current.

• Keep the high dV/dT SW, BOOST and TG nodes away

from sensitive small-signal nodes.

• Connect the INTVCC decoupling capacitor CVCC closely

to the INTVCC and PGND pins.

• Connect the top driver boost capacitor CB closely to the

BOOST and SW pins.

• Connect the VIN pin decoupling capacitor CF closely to

the VIN and PGND pins.

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