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LTC3532

3532fc

Table 2. Capacitor Vendor Information

SUPPLIER

WEB SITE

AVX

www.avxcorp.com

Murata

www.murata.com

Sanyo

www.sanyovideo.com

Taiyo Yuden

www.t-yuden.com

TDK

www.component.tdk.com

Input Capacitor Selection

Since VIN is the supply voltage for the IC, as well as the

input to the power stage of the converter, it is recommended

to place at least a 4.7μF, low ESR ceramic bypass capaci-

tor close to the VIN and GND pins. It is also important to

minimize any stray resistance from the converter to the

battery or other power source.

Optional Schottky Diodes

The Schottky diodes across the synchronous switches

B and D are not required (VOUT < 4.3V), but provide a

lower drop during the break-before-make time (typically

15ns) improving efﬁciency. Use a surface mount Schottky

diode such as an MBRM120T3 or equivalent. Do not use

ordinary rectiﬁer diodes, since the slow recovery times

will compromise efﬁciency. For applications with an

output voltage above 4.3V, a Schottky diode is required

from SW2 to VOUT.

Output Voltage > 4.3V

A Schottky diode from SW2 to VOUT is required for output

voltages over 4.3V. The diode must be located as close to

the pins as possible in order to reduce the peak voltage on

SW2 due to the parasitic lead and trace inductance.

Input Voltage > 4.5V

For applications with input voltages above 4.5V which

could exhibit an overload or short-circuit condition, a

2Ω/1nF series snubber is required between SW1 and

GND. A Schottky diode from SW1 to VIN should also be

added as close to the pins as possible. For the higher input

voltages, VIN bypassing becomes more critical; therefore,

a ceramic bypass capacitor as close to the VIN and SGND

pins as possible is also required.

Operating Frequency Selection

Higher operating frequencies allow the use of a smaller

inductor and smaller input and output ﬁlter capacitors,

thus reducing board area and component height. How-

ever, higher operating frequencies also increase the IC’s

total quiescent current due to the gate charge of the four

switches, as given by:

Buck: IQ = (0.125 • VIN • f) mA

Boost: IQ = [0.06 • (VIN + VOUT) • f] mA

Buck/Boost: IQ = [f • (0.19 • VIN + 0.06 • VOUT)] mA

where f = switching frequency in MHz. Therefore frequency

selection is a compromise between the optimal efﬁciency

and the smallest solution size.

Closing the Feedback Loop

The LTC3532 incorporates voltage mode PWM control.

The control to output gain varies with operation region

(buck, boost, buck/boost), but is usually no greater than

15. The output ﬁlter exhibits a double pole response, as

given by:

fFILTER

—POLE =

2• π •L • COUT

(in buck mode)

fFILTER

—POLE =

VIN

2• VOUT • π •L • COUT

(in boost mode)

where L is in henrys and COUT is in farads.

The output ﬁlter zero is given by:

fFILTER

— ZERO =

2• π •RESR •COUT

where RESR is the equivalent series resistance of the

output capacitor.

A troublesome feature in boost mode is the right-half plane

zero (RHP), given by:

fRHPZ =

VIN

2• π •IOUT •L • VOUT

APPLICATIO S I FOR ATIO

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