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AD7688

Rev. A | Page 15 of 28

DRIVER AMPLIFIER CHOICE

Although the AD7688 is easy to drive, the driver amplifier

needs to meet the following requirements:

•

The noise generated by the driver amplifier needs to be

kept as low as possible in order to preserve the SNR and

transition noise performance of the AD7688. Note that the

AD7688 has a noise much lower than most of the other

16-bit ADCs and, therefore, can be driven by a noisier op

amp while preserving the same or better system perform-

ance. The noise coming from the driver is filtered by the

AD7688 analog input circuit 1-pole, low-pass filter made

by RIN and CIN or by the external filter, if one is used.

Because the typical noise of the AD7688 is 53 μV rms,

the SNR degradation due to the amplifier is

⎟⎟

⎟

⎠

⎞

⎜⎜

⎜

⎝

⎛

−

)

(

20log

3dB

LOSS

SNR

where:

f–3dB is the input bandwidth in MHz of the AD7688

(9 MHz) or the cutoff frequency of the input filter, if one

is used.

N is the noise gain of the amplifier (for example, +1 in

buffer configuration).

eN is the equivalent input noise voltage of the op amp,

in nV/√Hz.

•

For ac applications, the driver should have a THD

performance commensurate with the AD7688. Figure 18

shows the THD vs. frequency that the driver should

exceed.

•

For multichannel multiplexed applications, the driver

amplifier and the AD7688 analog input circuit must settle

for a full-scale step onto the capacitor array at a 16-bit level

(0.0015%, 15 ppm). In the amplifier’s data sheet, settling at

0.1% to 0.01% is more commonly specified. This could

differ significantly from the settling time at a 16-bit level

and should be verified prior to driver selection.

Table 9. Recommended Driver Amplifiers

Amplifier

Typical Application

AD8021

Very low noise and high frequency

AD8022

Low noise and high frequency

OP184

Low power, low noise, and low frequency

AD8605, AD8615

5 V single-supply, low power

AD8519

Small, low power and low frequency

AD8031

High frequency and low power

SINGLE-TO-DIFFERENTIAL DRIVER

For applications using a single-ended analog signal, either

bipolar or unipolar, a single-ended-to-differential driver

allows for a differential input into the part. The schematic is

shown in Figure 30. When provided a single-ended input signal,

this configuration produces a differential ±VREF with midscale

at VREF/2.

10k

590

AD7688

IN+

IN–

REF

ANALOG INPUT

(

±10V, ±5V, ..)

590

μF

100nF

10k

VREF

590

100nF

VREF

Figure 30. Single-Ended-to-Differential Driver Circuit

VOLTAGE REFERENCE INPUT

The AD7688 voltage reference input, REF, has a dynamic input

impedance and should therefore be driven by a low impedance

source with efficient decoupling between the REF and GND

pins, as explained in the Layout section.

When REF is driven by a very low impedance source, for

example, a reference buffer using the AD8031 or the AD8605, a

10 μF (X5R, 0805 size) ceramic chip capacitor is appropriate for

optimum performance.

If an unbuffered reference voltage is used, the decoupling value

depends on the reference used. For instance, a 22 μF (X5R,

1206 size) ceramic chip capacitor is appropriate for optimum

performance using a low temperature drift ADR43x reference.

If desired, smaller reference decoupling capacitor values down

to 2.2 μF can be used with a minimal impact on performance,

especially DNL.

Regardless, there is no need for an additional lower value

ceramic decoupling capacitor (for example, 100 nF) between the

REF and GND pins.

POWER SUPPLY

The AD7688 is specified at 4.5 V to 5.5 V. It has, unlike other

low voltage converters, a low enough noise to design a 16-bit

resolution system with low supply and respectable performance.

It uses two power supply pins: a core supply VDD and a digital

input/output interface supply VIO. VIO allows direct interface

with any logic between 1.8 V and VDD. To reduce the supplies

needed, the VIO and VDD can be tied together. The AD7688 is

independent of power supply sequencing between VIO and

VDD. Additionally, it is very insensitive to power supply

variations over a wide frequency range, as shown in Figure 31,

which represents PSRR over frequency.

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