ADV7172KST datasheet(19/60 Pages) AD

Part #	ADV7172KST

Description	Digital PAL/NTSC Video Encoder with Six DACs (10 Bits), Color Control and Enhanced Power Management

PDF	60 Pages

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Manufacturer	AD [Analog Devices]

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19 / 60 page

REV. B

ADV7172/ADV7173

–19–

622

623

624

625

DISPLAY

VERTICAL BLANK

ODD FIELD

EVEN FIELD

HSYNC

BLANK

FIELD

DISPLAY

309

310

311

312

313

314

315

316

317

318

319

334

335

336

DISPLAY

VERTICAL BLANK

ODD FIELD

EVEN FIELD

HSYNC

BLANK

FIELD

DISPLAY

320

Figure 28. Timing Mode 1 (PAL)

Mode 1: Master Option

HSYNC, BLANK, FIELD

(Timing Register 0 TR0 = X X X X X 0 1 1)

In this mode the ADV7172/ADV7173 can generate horizontal SYNC and Odd/Even FIELD signals. A transition of the FIELD

input when

HSYNC is low indicates a new frame, i.e., vertical retrace. The BLANK signal is optional. When the BLANK input is

disabled, the ADV7172/ADV7173 automatically blanks all normally blank lines as per CCIR-624. Pixel data is latched on the rising

clock edge following the timing signal transitions. Mode 1 is illustrated in Figure 27 (NTSC) and Figure 28 (PAL). Figure 29 illus-

trates the

HSYNC, BLANK, and FIELD for an odd-or-even field transition relative to the pixel data.

FIELD

PIXEL

DATA

PAL = 12 * CLOCK/2

NTSC = 16 * CLOCK/2

PAL = 132 * CLOCK/2

NTSC = 122 * CLOCK/2

HSYNC

BLANK

Figure 29. Timing Mode 1 Odd/Even Field Transitions Master/Slave

ADV7172KST Datasheet(PDF) 19 Page - Analog Devices

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