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TIR1000PWR Datasheet(PDF) 4 Page - Texas Instruments |
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TIR1000PWR Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 14 page ![]() TIR1000, TIR1000I STANDALONE IrDA ™ ENCODER AND DECODER SLLS228F – DECEMBER 1995 – REVISED JULY 1999 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PRINCIPLES OF OPERATION IrDA encoder function Serial data from a UART is encoded to transmit data to the optoelectronics. While the serial data input to this block (U_TXD) is high, the output (IR_TXD) is always low, and the counter used to form a pulse on IR_TXD is continuously cleared. After U_TXD resets to 0, IR_TXD rises on the falling edge of the seventh 16XCLK. On the falling edge of the tenth 16XCLK pulse, IR_TXD falls, creating a 3-clock-wide pulse. While U_TXD stays low, a pulse is transmitted during the seventh to tenth clocks of each 16-clock bit cycle. U_TXD 16XCLK IR_TXD 1 2 34 56 7 8 10 12 14 16 Figure 2. IrDA-SIR Encoding Scheme – Detailed Timing Diagram Figure 3. Encoding Scheme – Macro View 16XCLK U_TXD IR_TXD 16 Cycles 16 Cycles 16 Cycles 16 Cycles IrDA decoder function After reset, U_RXD is high and the 4-bit counter is cleared. When a falling edge is detected on IR_RXD, U_RXD falls on the next rising edge of 16XCLK with sufficient setup time. U_RXD stays low for 16 cycles (16XCLK) and then returns to high as required by the IrDA specification. As long as no pulses (falling edges) are detected on IR_RXD, U_RXD remains high. IR_RXD 16XCLK U_RXD 1 2 3 4 5 6 7 8 10 12 14 16 Figure 4. IrDA-SIR Decoding Scheme – Detailed Timing Diagram Figure 5. Decoding Scheme – Macro View 16XCLK IR_RXD U_RXD 16 Cycles 16 Cycles 16 Cycles 16 Cycles |
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