Electronic Components Datasheet Search
  English  ▼

X  

TIR1000PWR Datasheet(PDF) 4 Page - Texas Instruments

Click here to check the latest version.
Part # TIR1000PWR
Description  STANDALONE IrDAE ENCODER AND DECODER
PDF  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TIR1000PWR Datasheet(HTML) 4 Page - Texas Instruments

  TIR1000PWR Datasheet HTML 1Page - Texas Instruments TIR1000PWR Datasheet HTML 2Page - Texas Instruments TIR1000PWR Datasheet HTML 3Page - Texas Instruments TIR1000PWR Datasheet HTML 4Page - Texas Instruments TIR1000PWR Datasheet HTML 5Page - Texas Instruments TIR1000PWR Datasheet HTML 6Page - Texas Instruments TIR1000PWR Datasheet HTML 7Page - Texas Instruments TIR1000PWR Datasheet HTML 8Page - Texas Instruments TIR1000PWR Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 14 page
background image
TIR1000, TIR1000I
STANDALONE IrDA
™ ENCODER AND DECODER
SLLS228F – DECEMBER 1995 – REVISED JULY 1999
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
IrDA encoder function
Serial data from a UART is encoded to transmit data to the optoelectronics. While the serial data input to this
block (U_TXD) is high, the output (IR_TXD) is always low, and the counter used to form a pulse on IR_TXD is
continuously cleared. After U_TXD resets to 0, IR_TXD rises on the falling edge of the seventh 16XCLK. On
the falling edge of the tenth 16XCLK pulse, IR_TXD falls, creating a 3-clock-wide pulse. While U_TXD stays
low, a pulse is transmitted during the seventh to tenth clocks of each 16-clock bit cycle.
U_TXD
16XCLK
IR_TXD
1
2 34 56 7
8
10
12
14
16
Figure 2. IrDA-SIR Encoding Scheme –
Detailed Timing Diagram
Figure 3. Encoding Scheme – Macro View
16XCLK
U_TXD
IR_TXD
16 Cycles
16 Cycles
16 Cycles
16 Cycles
IrDA decoder function
After reset, U_RXD is high and the 4-bit counter is cleared. When a falling edge is detected on IR_RXD, U_RXD
falls on the next rising edge of 16XCLK with sufficient setup time. U_RXD stays low for 16 cycles (16XCLK) and
then returns to high as required by the IrDA specification. As long as no pulses (falling edges) are detected on
IR_RXD, U_RXD remains high.
IR_RXD
16XCLK
U_RXD
1 2 3 4 5 6 7 8
10
12
14
16
Figure 4. IrDA-SIR Decoding Scheme –
Detailed Timing Diagram
Figure 5. Decoding Scheme – Macro View
16XCLK
IR_RXD
U_RXD
16 Cycles
16 Cycles
16 Cycles
16 Cycles



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com