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ALD1107 Datasheet(PDF) 1 Page - Advanced Linear Devices |
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ALD1107 Datasheet(HTML) 1 Page - Advanced Linear Devices |
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1 / 6 page ![]() DP1 (1) DP2 (14) GP1 (2) SP1 (3) SP2 (12) V+ (11) GP2 (13) DP3 (10) DP4 (5) GP3 (9) SP3 (8) SP4 (7) ~ V- (4) V+ (11) GP4 (6) ALD1107 BLOCK DIAGRAM GENERAL DESCRIPTION The ALD1107/ALD1117 are monolithic quad/dual P-channel enhance- ment mode matched MOSFET transistor arrays intended for a broad range of precision analog applications. The ALD1107/ALD1117 offer high input impedance and negative current temperature coefficient. The transistor pairs are matched for minimum offset voltage and differential thermal response, and they are designed for precision analog switching and amplifying applications in +2V to +12V systems where low input bias current, low input capacitance and fast switching speed are desired. These MOSFET devices feature very large (almost infinite) current gain in a low frequency, or near DC operating environment. The ALD1107/ALD1117 are builiding blocks for differential amplifier input stages, transmission gates, multiplexer applications, current sources, current mirrors and other preci- sion analog circuits. APPLICATIONS • Precision current sources • Precision current mirrors • Voltage Choppers • Differential amplifier input stage • Voltage comparator • Data converters • Sample and Hold • Precision analog signal processing ADVANCED LINEAR DEVICES, INC. QUAD/DUAL P-CHANNEL MATCHED MOSFET ARRAY ALD1107/ALD1117 FEATURES • Low threshold voltage of -0.7 • Low input capacitance • Low VOS 2mV typical • High input impedance -- 1014 Ω typical • Low input and output leakage currents • Negative current (IDS) temperature coefficient • Enhancement-mode (normally off) • DC current gain 109 • Low input and output leakage currents Operating Temperature Range* -55 °C to +125°C0°C to +70°C0°C to +70°C 8-Pin CERDIP 8-Pin Plastic Dip 8-Pin SOIC Package Package Package ALD1117 DA ALD1117PA ALD1117 SA 14-Pin CERDIP 14-Pin Plastic Dip 14-Pin SOIC Package Package Package ALD1107 DB ALD1107 PB ALD1107 SB ORDERING INFORMATION * Contact factory for industrial temperature range. PIN CONFIGURATION BLOCK DIAGRAM DP2 GP2 SP2 GP3 SP3 GP1 SP1 DP4 GP4 1 2 3 4 DB, PB, SB PACKAGE 5 6 7 8 9 10 11 12 13 14 DP1 V+ V- DP3 SP4 1 ALD1107 DP1 (1) DP2 (8) ~ GP1 (2) SP1 (3) SP2 (6) V - (4) V+ (5) GP2 (7) ALD1117 DP2 GP2 SP2 GP1 SP1 1 2 3 4 DA, PA, SA PACKAGE 5 6 7 8 DP1 V+ V- 1 ALD1117 © 1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com |
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