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HR2000GS Datasheet(PDF) 4 Page - Monolithic Power Systems |
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HR2000GS Datasheet(HTML) 4 Page - Monolithic Power Systems |
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4 / 20 page ![]() HR2000 — FLUORESCENT LAMP HB DRIVER WITH PFC HR2000 Rev. 1.0 www.MonolithicPower.com 4 2/20/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. LIMITING VALUE (1) Condition Symbol Min. Max. Unit A High side floating supply voltage Operation Vbst 630 V B Voltage at SW Vsw -3 630 V C Voltage at pin CS Note7 Vcs -0.5 VBE V D Current in pin CS t<1.0µs, note4 Ics -10 10 mA E Voltage at pin UG Note7 VUG Vsw-VBE VBST V F Voltage at pin LG Note7 VLG -VBE Vvcc V G Low voltage supply t<0.5s over lifetime Vvcc 0 15 V H Low voltage supply Vvcc 0 14 V I Clamp current in pin VCC In fault state Ivcc 5 mA I Voltage at pin ZCD Vzcd -7 7 V J Voltage at pin OVC VOVC 0 5 V K Current in pin VO Vvcc=0 to Vvccmax Ivo 0 200 µA L Current in pin CT Vvcc=0 to Vvccmax ICT 0 200 µA M Current in pin CP/EOL Vvcc=0 to Vvccmax Note9 IEOL -1 1 mA N Slew rate at pins SW,HG and BST With respect to ground SR -4 4 V/ns O Junction temperature Tj 150 °C P Ambient temperature Tamb -40 125 °C Q Storage temperature Tstg -55 150 °C R HBM electrostatic handling voltage SW,HG,BST,VCC and LG VO, OVC, CT, FC, CP/EOL, REF, Pre/FT, CS, ZCD, GATE Note5 Vesd(HBM) 2000 V V S MM electrostatic handling voltage Pins Pre/FT Note6 Vesd(MM) 150 V Pins VO, OVC, CT, FC, CP/EOL, REF, CS, ZCD, GATE, SW,HG,BST,VCC and LG 200 V T Charge coupling at pins REF and CT Operating Qcoupl -8 8 pC U Reference resistor RREF 36 91 k Recommended Operating Conditions (3) Supply Voltage VCC ........................ 10V to 12V Analog inputs and outputs ............ -0.3V to 6.5V Operating Junction Temp (TJ) . -40°C to + 125°C Thermal Resistance (4) θJA θJC SOIC16...................................80.......35 ...°C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by D(MAX)=(TJ(MAX)- TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB 5) In accordance with the Human Mody Model (HBM), i.e. equivalent to discharging a 100pF capacitor through a 1.5k series resistor 6) In accordance with the Mancine Model (MM), i.e. equivalent to discharging a 200pF capacitor through a 10 series resistor and a 0.75µH inductor. 7) At Tamb=25°C the typical VBE IS 0.7V. 8) At negative CS currents (typ<-5mA) the capacitive mode protection can be triggered. 9) When EOL detection is enabled |
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