MP2144 Rev. 1.03

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12

12/20/2012

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The input voltage ripple caused by capacitance

can be estimated by:

LOAD

OUT

OUT

IN

IN

SIN

IV

V

V1

fC1

V

V

⎛⎞

Δ=

×

× −

⎜⎟

×

⎝⎠

Selecting the Output Capacitor

The output capacitor (C2) maintains the output

DC voltage. Use Ceramic capacitors. Low ESR

capacitors keep the output voltage ripple low.

The output voltage ripple can be estimated by:

OUT

OUT

OUT

ESR

S1

IN

S

VV

1

V1

R

fL

V

8 f

C2

⎛⎞

⎛⎞

Δ=

× −

×

+

⎜⎟

⎜⎟

×× ×

⎝⎠ ⎝⎠

equivalent series resistance (ESR) value of the

output capacitor.

Using ceramic capacitors, the impedance at the

switching frequency is dominated by the

capacitance. The output voltage ripple is mainly

caused by the capacitance. For simplification,

the output voltage ripple can be estimated by:

OUT

OUT

OUT

2

IN

S1

VV

ΔV1

V

8f

L

C2

⎛⎞

=× −

⎜⎟

×× ×

⎝⎠

For tantalum or electrolytic capacitors, the ESR

dominates the impedance at the switching

frequency. For simplification, the output ripple

can be approximated as:

OUT

OUT

OUT

ESR

IN

S1

VV

ΔV1

R

fL

V

⎛⎞

=× −

×

⎜⎟

×

⎝⎠

The characteristics of the output capacitor also

affect the stability of the regulation system.

PCB Layout Recommendation

Proper layout of the switching power supplies is

very important, and sometimes critical for

proper

function.

For

the

high-frequency

switching converter, poor layout design can

result in poor line or load regulation and stability

issues.

The high current paths (GND, IN, and SW)

should be placed very close to the device using

short, direct, and wide traces. The input

capacitor needs to be as close as possible to

the IN and GND pins. The external feedback

resistors should be placed next to the FB pin.

Keep the switching node SW short and away

from the feedback network.

8

7

6

5

L1

R4

R3

1

2

3

4

OUT

VIN

GND

SW

C1

C1A

Figure 3: Layout Recommendation