MP8049S - 24V, 5.5A QUAD CHANNEL POWER HALF-BRIDGE

M8049S Rev. 1.0

www.MonolithicPower.com

5

9/28/2012

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PIN FUNCTIONS

Pin #

Name

Description

1,2

SW1B

Switched Output 1B. Connect the output LC filter to SW1B. SW1B is valid approximately

100µs after VSP goes high.

3,4,5

VSP1

Power Supply Input. Connect VSP1 to the positive side of the input power supply. Bypass

VSP1 to PGND as close to the IC as possible.

6,7

SW1A

Switched Output 1A. Connect the output LC filter to SW1A. SW1A is valid approximately

100µs after VSP goes high.

8,9

PGND1A

Power Ground of channel 1A. Connect the exposed pad on bottom side to the ground

plane.

10

BST1A

Bootstrap Supply. BST1A powers the high-side gate of the SW1A stage. Connect a 0.1μF

or greater capacitor between BST1A and SW1A.

11

N/C

No connect.

12

PWM1A

Driver Logic Input 1A. Drive PWM1 with the signal that controls the MP8049S SW1A. Drive

PWM high to turn on the high side switch; drive PWM low to turn on the low-side switch.

13

PWM1B

Driver Logic Input 1B. Drive PWM1 with the signal that controls the MP8049S SW1B. Drive

PWM high to turn on the high side switch; drive PWM low to turn on the low-side switch.

14

FAULTB Fault Output. A low output at FAULT indicates that the MP8049S has detected an over

temperature or over current or under voltage condition. This output is open drain.

15

SHDNB Shutdown Input. When low, the IC will be shut off.

16

PWM2A

Driver Logic Input 2A. Drive PWM2 with the signal that controls the MP8049S SW2A. Drive

PWM high to turn on the high side switch; drive PWM low to turn on the low-side switch.

17

STBYB

Standby Input. Default low (internal pull-down). If driven high, the output of the drivers is

determined by the PWM1A/1B/2A/2B. If driven low, the output of both drivers is high

impedance.

18

PWM2B

Driver Logic Input 2B. Drive PWM2 with the signal that controls the MP8049S SW2B. Drive

PWM high to turn on the high side switch; drive PWM low to turn on the low-side switch.

19

FLT3B

Fault monitor pin. Detailed please see the Fault Output section. This output is open drain.

20

FLT2B

Fault monitor pin. Detailed please see the Fault Output section. This output is open drain.

21

BST2B

Bootstrap Supply. BST2B powers the high-side gate of the SW2B stage. Connect a 0.1μF

or greater capacitor between BST2B and SW2B.

22, 23

PGND2B

Power Ground of Channel 2B. Connect the exposed pad on the bottom side to the ground

plane.

24, 25

SW2B

Switched Output 2B. Connect the output LC filter to SW2B. SW2B is valid approximately

100µs after VSP goes high.

26,27,

28

VSP2

Power Supply Input. Connect VSP2 to the positive side of the input power supply. Bypass

VSP2 to PGND as close to the IC as possible.

29, 30

SW2A

Switched Output 2A. Connect the output LC filter to SW2A. SW2A is valid approximately

100µs after VSP goes high.