MP8736– HIGHEFFICIENCY,FAST TRANSIENT,6A, 19V SYNCHRONOUSBUCKCONVERTERIN ATINY3X4mmPACKAGE

MP8736 Rev. 1.34

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16

4/18/2012

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too small. Otherwise, it’s easy to hit the current

limit during SS. A minimum value of 4.7nF should

be used if the output capacitance value is larger

than 330μF.

Power Good (PGOOD)

The MP8736 has power-good (PGOOD) output.

The PGOOD pin is the open drain of a MOSFET.

source through a resistor (e.g. 100k). After the

input voltage is applied, the MOSFET is turned

on so that the PGOOD pin is pulled to GND

before SS is ready. After FB voltage reaches

90% of REF voltage, the PGOOD pin is pulled

high after a delay.

The PGOOD delay time is determined as follows:

PGOOD

SS

T

(ms) 0.5 T (ms) 0.5

=×

+

(12)

When the FB voltage drops to 85% of REF

voltage, the PGOOD pin will be pulled low.

Over-Current Protection (OCP) and Short-

Circuit Protection (SCP)

The MP8736 has cycle-by-cycle over-current limit

control. The inductor current is monitored during

the ON state. Once it detects that the inductor

current is higher than the current limit, the HS-

FET is turned off. At the same time, the OCP

timer is started. The OCP timer is set as 40μs. If

in the following 40μs, the current limit is hit for

every cycle, then it’ll trigger OCP latch-off. The

converter needs power cycle to restart after it

triggers OCP.

If short circuit happens, then the current limit will

be hit immediately and the FB voltage will

become lower than 50% of the REF voltage.

When the current limit is hit and the FB voltage is

lower than 50% of the REF voltage (0.815V), the

device considers this as a dead short on the

output and triggers SCP latch-off immediately.

This is short circuit protection (SCP).

Over/Under-voltage Protection (OVP/UVP)

The MP8736 monitors the output voltage through

a resistor divider feedback (FB) voltage to detect

overvoltage and undervoltage on the output.

When the FB voltage is higher than 125% of the

REF voltage (0.815V), it’ll trigger OVP latch-off.

Once it triggers OVP, the LS-FET is always on

while the HS-FET is always off. It needs power

cycle to power up again. When the FB voltage is

below 50% of the REF voltage (0.815V), it is

recognized as UV (under-voltage). Usually, UVP

accompanies a hit in current limit and this results

in SCP.

UVLO protection

The

MP8736

has

under-voltage

lock-out

protection (UVLO). When the input voltage is

higher than the UVLO rising threshold voltage,

the MP8736 will be powered up. It shuts off when

the input voltage is lower than the UVLO falling

threshold voltage. This is non-latch protection.

Thermal Shutdown

Thermal shutdown is employed in the MP8736.

The junction temperature of the IC is internally

monitored. If the junction temperature exceeds

the threshold value (typically 150ºC), the

converter shuts off. This is a non-latch protection.

There is about 25ºC hysteresis. Once the

junction temperature drops to about 125ºC, it

initiates a SS.