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A3P030 Datasheet(PDF) 92 Page - Microsemi Corporation |
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A3P030 Datasheet(HTML) 92 Page - Microsemi Corporation |
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92 / 220 page  ProASIC3 DC and Switching Characteristics 2-78 Revision 13 Output DDR Module Figure 2-21 • Output DDR Timing Model Table 2-103 • Parameter Definitions Parameter Name Parameter Definition Measuring Nodes (from, to) tDDROCLKQ Clock-to-Out B, E tDDROCLR2Q Asynchronous Clear-to-Out C, E tDDROREMCLR Clear Removal C, B tDDRORECCLR Clear Recovery C, B tDDROSUD1 Data Setup Data_F A, B tDDROSUD2 Data Setup Data_R D, B tDDROHD1 Data Hold Data_F A, B tDDROHD2 Data Hold Data_R D, B Data_F (from core) CLK CLKBUF Out FF2 INBUF CLR DDR_OUT Output DDR FF1 0 1 X X X X X X X A B D E C C B OUTBUF Data_R (from core) |
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