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AD9860PCB Datasheet(PDF) 3 Page - Analog Devices |
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AD9860PCB Datasheet(HTML) 3 Page - Analog Devices |
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3 / 32 page  REV. 0 AD9860/AD9862 –3– Test AD9860/AD9862 Rx PARAMETERS (continued) Temp Level Min Typ Max Unit DC ACCURACY Differential Nonlinearity 25ºC III ±0.3/±0.4 LSB Integral Nonlinearity 25ºC III ±1.2/±5 LSB Offset Error 25ºC III ±0.1 %FSR Gain Error 25ºC III ±0.2 %FSR Aperture Delay 25ºC III 2.0 ns Aperture Uncertainty (Jitter) 25ºC III 1.2 ps rms Input Referred Noise 25ºC III 250 µV Reference Voltage Error REFT-REFB Error (1 V) 25ºCI ±1 ±4mV AD9860 DYNAMIC PERFORMANCE (AIN = –0.5 dBFS, f = 5 MHz) Signal-to-Noise Ratio 25 ∞CI 59.0 60.66 dBc Signal-to-Noise and Distortion Ratio 25 ∞CI 56.0 58.0 dBc Total Harmonic Distortion 25 ∞CI –76.5 –70.5 dBc Spurious Free Dynamic Range 25 ∞CI 70.3 81.0 dBc AD9862 DYNAMIC PERFORMANCE (AIN = –0.5 dBFS, f = 5 MHz) Signal-to-Noise Ratio 25 ∞CI 62.6 64.2 dBc Signal-to-Noise and Distortion Ratio 25 ∞CI 62.5 64.14 dBc Total Harmonic Distortion 25 ∞CI –79.22 –73.2 dBc Spurious Free Dynamic Range 25 ∞CI 77.09 85.13 dBc CHANNEL-TO-CHANNEL ISOLATION Tx-to-Rx (AOUT = 0 dBFS, fOUT = 7 MHz) 25ºC III >90 dB Rx Channel Crosstalk (f1 = 6 MHz, f2 = 9 MHz) 25ºC III >80 dB PARAMETERS CMOS LOGIC INPUTS Logic “1” Voltage, VIH 25ºCII DRVDD – 0.7 V Logic “0” Voltage, VIL 25ºCII 0.4 V Logic “1” Current 25ºCII 12 µA Logic “0” Current 25ºCII 12 µA Input Capacitance 25ºC III 3 pF CMOS LOGIC OUTPUTS (1 mA Load) Logic “1” Voltage, VOH 25ºCII DRVDD – 0.6 V Logic “0” Voltage, VOL 25ºCII 0.4 V POWER SUPPLY Analog Supply Currents Tx (Both Channels, 20 mA FS Output) 25ºCI 70 76 mA Tx Powered Down 25ºCI 2.5 5.0 mA Rx (Both Channels, Input Buffer Enabled) 25ºCI 275 307 mA Rx (Both Channels, Input Buffer Disabled) 25ºC III 245 mA Rx (32 MSPS, Low Power Mode, Buffer Disabled) 25ºC III 155 mA Rx (16 MSPS, Low Power Mode, Buffer Disabled) 25ºC III 80 mA Rx Path Powered Down 25ºCI 5.0 6.0 mA DLL 25ºC III 12 mA Digital Supply Current AD9860 Both Rx and Tx Path (All Channels Enabled) 2 Interpolation, fDAC = fADC = 64 MSPS 25ºCI 92 112 mA AD9862 Both Rx and Tx Path (All Channels Enabled) 2 Interpolation, fDAC = fADC = 64 MSPS 25ºCI 104 124 mA Tx Path (fDAC = 128 MSPS) Processing Blocks Disabled 25ºC III 45 mA 4 Interpolation 25ºC III 90 mA 4 Interpolation, Coarse Modulation 25ºC III 110 mA 4 Interpolation, Fine Modulation 25ºC III 110 mA 4 Interpolation, Coarse and Fine Modulation 25ºC III 130 mA |
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