AM79C873 datasheet(29/44 Pages) AMD

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Am79C873

PRELIMINARY

AMD Speciﬁed Conﬁguration and Status

Bit

Bit Name

Default

Description

17.15

100FDX

1, RO

100 M Full Duplex Operation:

After Auto-Negotiation is completed, the results will be written to this bit.

A 1 in this bit position indicates 10 0M Full Duplex operation. The software

can read bits [15:12] to determine which mode is selected after Auto-

Negotiation. This bit is invalid when Auto-Negotiation is disabled.

17.14

100HDX

1, RO

100 M Half Duplex Operation:

After Auto-Negotiation is completed, the results will be written to this bit.

A 1 in this bit position indicates 100 M Half Duplex operation. The software

can read bits [15:12] to determine which mode is selected after Auto-

Negotiation. This bit is invalid when Auto-Negotiation is disabled.

17.13

10FDX

1, RO

10 M Full Duplex Operation:

After Auto-Negotiation is completed, the results will be written to this bit.

A 1 in this bit position indicates 10 M Full Duplex operation. The software

can read bits [15:12] to determine which mode is selected after Auto-

Negotiation. This bit is invalid when Auto-Negotiation is disabled.

17.12

10HDX

1, RO

10 M Half Duplex Operation:

After Auto-Negotiation is completed, the results will be written to this bit.

A 1 in this bit position indicates 10M Half Duplex operation. The software

can read bits [15:12] to determine which mode is selected after Auto-

Negotiation. This bit is invalid when Auto-Negotiation is disabled.

17.11-

17.10

Reserved

0, RW

Reserved:

Write as 0, ignore on read.

17.8-17.4

PHYAD[4:0]

(PHYAD), RW

PHY Address Bit 4:0:

The values of the PHYAD[4:0] pins are latched to this register at power-

up/reset. The ﬁrst PHY address bit transmitted or received is the MSB (bit

4). A station management entity connected to multiple PHY entities must

know the appropriate address of each PHY. A PHY address of <00000>

will cause the isolate bit of the BMCR (bit 10, Register Address 00) to be

set.

Bit

Bit Name

Default

Description

17.3-17.0

ANMB[3:0]

0, RO

Auto-Negotiation Monitor Bits:

These bits are for debug only. The Auto-Negotiation status will be written

to these bits.

0000In IDLE state

0001

Ability match

0010Acknowledge match

0011Acknowledge match fail

0100

Consistency match

0101

Consistency match fail

0110Parallel detect signal_link_ready

0111Parallel detect signal_link_ready fail

1000Auto-Negotiation completed successfully

AM79C873 Datasheet(PDF) 29 Page - Advanced Micro Devices

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