AM79C988BJC datasheet(11/25 Pages) AMD

11 / 25 page

Am79C988A

PRELIMINARY

CMOS/PAUI Mode Selection

This command sets the QuIET interface drivers (PDO,

PDI, PCI) to be driven at normal PAUI signal levels or

CMOS voltage levels. The default is PAUI levels. Refer

to the DC Characteristics table for voltage levels.

CMOS Levels

PAUI Levels

Reset Function

The QuIET device enters the reset state when the reset

pin (RST) is held LOW. All ports, status registers, and

command registers are put into their default state.When

powering up the device, the RST pin should be held

LOW for 150 microseconds (

µs).At other times, the RST

pin should be held LOW for a minimum of 4

µs. The

default conditions are detailed below.

Command and Status Default Conditions

Command

Default

Extended Distance

Disabled

Link Test

Enabled

Link Pulse Transmit

Enabled

Correct Polarity

Disabled

Loopback Test

Disabled

Transceiver Mode Selection

Normal

CMOS/PAUI Mode

PAUI Mode

Status

Default

Device

QuIET

Link

Fail

Polarity

Correct

Jabber

No Error

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