| Electronic Components Datasheet Search |
|
AMMCL002AWP Datasheet(PDF) 29 Page - Advanced Micro Devices |
|
|
|||||||||||||||||||||||||||||
AMMCL002AWP Datasheet(HTML) 29 Page - Advanced Micro Devices |
|
29 / 36 page ![]() AmMCL00XA 29 PRELIMIN ARY AIS MEMORY MAP The AIS (Attribute Information Structure) is an area of memory used for storing information about the config- uration of the Miniature Card. The AIS is recommended to be stored in the first sector of the first device of the Flash array. As this area is not explicitly protected, the AIS information must be reloaded onto the card in the event that the information is erased. The AIS has five unique information areas: 1. Identification Data: This data includes Manufacturer information (Manufacturer and card name). 2. Compatibility Data: This data specifies basic infor- mation about the card (memory size, access time, memory type, power, etc.) 3. Burst Data (not applicable) 4. DRAM Data (not applicable) 5. Reserved Data: This data area is reserved for future use. The AIS supports up to four different memory technol- ogies on a card. Some of the information areas are repeated in the memory map in order to specify dif- ferent technologies (see Table 12). The Technology Count field in the Identification Data section defines the number of different technologies on a card. The first memory technology is defined in the AIS memory map from address 40H through 7FH. The second memory technology is defined from 80H through BFH. The third memory technology is defined from C0H to DFH. The fourth memory technology is defined from E0H to FFH. The AIS is stored as bytes within the 16-bit Miniature Card data word. The even byte D0–D7 stores the AIS data, and the odd byte D8–D15 is reserved by the card manufacturer for manufacturing information. Notes: 1. PA is address of the memory location to be programmed. 2. PD is data to be programmed at byte address. 3. D7 is the complement of the data written to the device. 4. DOUT is the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence. 6. These waveforms are for the x16 mode. 21138E-13 Figure 12. Alternate CE# Controlled Write Operation Timings tWH tWS OE# CE# WE# VCC tDS Data tAH Addresses tDH tCP PD DQ7# DOUT tEHEH3_or_4 tWC tAS tCPH tVCS XXXXh PA PA Data# Polling A0h tGHEL |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |