74HC164DB datasheet(9/20 Pages) NXP

9 / 20 page

74HC_HCT164

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Product data sheet

Rev. 7 — 13 June 2013

9 of 20

NXP Semiconductors

74HC164; 74HCT164

8-bit serial-in, parallel-out shift register

[1]

tpd is the same as tPHL and tPLH.

[2]

tt is the same as tTHL and tTLH.

[3]

CPD is used to determine the dynamic power dissipation (PD in W):

PD =CPD  VCC2  fi  N+  (CL  VCC2  fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

 (C

L  VCC

 f

o) = sum of outputs.

CPD

power

dissipation

capacitance

per package;

VI =GND to VCC  1.5 V

[3]

-40-

Table 7.

Dynamic characteristics …continued

GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specified

Symbol Parameter

Conditions

C

40 C to +85 C 40 C to +125 C Unit

Min

Typ

Max

Min

Max

Min

Max

(1) Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 7.

Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock pulse width, the output

transition times and the maximum clock frequency

001aal392

CP input

Qn output

tPHL

tPLH

tTHL

tTLH

VOH

GND

VOL

1/fmax

Table 8.

Measurement points

Type

Input

Output

74HC164

0.5VCC

0.1VCC

0.9VCC

74HCT164

1.3 V

0.1VCC

0.9VCC

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