LM5576MH datasheet(17/30 Pages) TI

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REF LEVEL

0.000 dB

0.0 deg

100

START 50.000 Hz

10k

STOP 50 000.000 Hz

/DIV

10.000 dB

45.000 deg

GAIN

PHASE

LM5576, LM5576-Q1

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SNVS447I – JANUARY 2007 – REVISED APRIL 2013

DC Gain(MOD) = Gm(MOD) x RLOAD = 2 x RLOAD

(15)

The dominant low frequency pole of the modulator is determined by the load resistance (RLOAD,) and output

capacitance (COUT). The corner frequency of this pole is:

fp(MOD) = 1 / (2π RLOAD COUT)

(16)

For RLOAD = 5Ω and COUT = 177µF then fp(MOD) = 180Hz

DC Gain(MOD) = 2 x 5 = 10 = 20dB

For the design example of Figure 9 the following modulator gain vs. frequency characteristic was measured as

shown in Figure 17.

Figure 17. Gain and Phase of Modulator

RLOAD = 5 Ohms and COUT = 177µF

Components R4 and C5 configure the error amplifier as a type II configuration which has a pole at DC and a

zero at fZ = 1 / (2πR4C5). The error amplifier zero cancels the modulator pole leaving a single pole response at

the crossover frequency of the loop gain. A single pole response at the crossover frequency yields a very stable

loop with 90 degrees of phase margin.

For the design example, a target loop bandwidth (crossover frequency) of 20kHz was selected. The

compensation network zero (fZ) should be selected at least an order of magnitude less than the target crossover

frequency. This constrains the product of R4 and C5 for a desired compensation network zero 1 / (2

π R4 C5) to

be less than 2kHz. Increasing R4, while proportionally decreasing C5, increases the error amp gain. Conversely,

decreasing R4 while proportionally increasing C5, decreases the error amp gain. For the design example C5 was

selected for 0.01µF and R4 was selected for 49.9k

Ω. These values configure the compensation network zero at

320Hz. The error amp gain at frequencies greater than fZ is: R4 / R5, which is approximately 10 (20dB).

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