64GA106 datasheet(273/330 Pages) MICROCHIP

273 / 330 page

 2010 Microchip Technology Inc.

DS39905E-page 273

PIC24FJ256GA110 FAMILY

TABLE 28-4:

DC CHARACTERISTICS: OPERATING CURRENT (IDD)

DC CHARACTERISTICS

Standard Operating Conditions: 2.0V to 3.6V (unless otherwise stated)

Operating temperature

-40°C

 TA  +85°C for Industrial

-40°C

 TA  +125°C for Extended

Parameter No.

Typical(1)

Max

Units

Conditions

Operating Current (IDD): PMD Bits are Set(2)

DC20

0.83

1.2

-40°C

2.0V(3)

1 MIPS

DC20a

0.83

1.2

+25°C

DC20b

0.83

1.2

+85°C

DC20c

0.9

1.3

+125°C

DC20d

1.1

1.7

-40°C

3.3V(4)

DC20e

1.1

1.7

+25°C

DC20f

1.1

1.7

+85°C

DC20g

1.2

1.7

+125°C

DC23

3.3

4.5

-40°C

2.0V(3)

4 MIPS

DC23a

3.3

4.5

+25°C

DC23b

3.3

4.6

+85°C

DC23c

3.4

4.6

+125°C

DC23d

4.3

6.5

-40°C

3.3V(4)

DC23e

4.3

6.5

+25°C

DC23f

4.3

6.5

+85°C

DC23g

4.3

6.5

+125°C

DC24

18.2

24.0

-40°C

2.5V(3)

16 MIPS

DC24a

18.2

24.0

+25°C

DC24b

18.2

24.0

+85°C

DC24c

18.2

24.0

+125°C

DC24d

18.2

24.0

-40°C

3.3V(4)

DC24e

18.2

24.0

+25°C

DC24f

18.2

24.0

+85°C

DC24g

18.2

24.0

+125°C

DC31

15.0

54.0

A-40°C

2.0V(3)

LPRC (31 kHz)

DC31a

15.0

54.0

A+25°C

DC31b

20.0

69.0

A+85°C

DC31c

60.0

159.0

A

+125°C

DC31d

57.0

96.0

A-40°C

3.3V(4)

DC31e

57.0

96.0

A+25°C

DC31f

95.0

145.0

A+85°C

DC31g

120.0

281.0

A

+125°C

Note 1:

Data in “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only and

are not tested.

The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading

and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the

current consumption. The test conditions for all IDD measurements are as follows: OSCI driven with external square

wave from rail to rail. All I/O pins are configured as inputs and pulled to VDD.

MCLR = VDD; WDT and FSCM are disabled. CPU, SRAM, program memory and data memory are operational. No

peripheral modules are operating and all of the Peripheral Module Disable (PMD) bits are set.

On-chip voltage regulator disabled (ENVREG tied to VSS).

On-chip voltage regulator enabled (ENVREG tied to VDD).

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