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64GA106 Datasheet(PDF) 294 Page - Microchip Technology |
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64GA106 Datasheet(HTML) 294 Page - Microchip Technology |
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294 / 330 page ![]() PIC24FJ256GA110 FAMILY DS39905E-page 294 2010 Microchip Technology Inc. FIGURE 28-14: SPIx MODULE SLAVE MODE TIMING CHARACTERISTICS (CKE = 1) TABLE 28-27: SPIx MODULE SLAVE MODE TIMING REQUIREMENTS (CKE = 1) AC CHARACTERISTICS Standard Operating Conditions: 2.0V to 3.6V (unless otherwise stated) Operating temperature -40°C TA +85°C for Industrial Param No. Symbol Characteristic Min Typ(1) Max Units Conditions SP70 TscL SCKx Input Low Time 30 — — ns SP71 TscH SCKx Input High Time 30 — — ns SP72 TscF SCKx Input Fall Time(2) —10 25 ns SP73 TscR SCKx Input Rise Time(2) —10 25 ns SP30 TdoF SDOx Data Output Fall Time(2) —10 25 ns SP31 TdoR SDOx Data Output Rise Time(2) —10 25 ns SP35 TscH2doV, TscL2doV SDOx Data Output Valid after SCKx Edge — — 30 ns SP40 TdiV2scH, TdiV2scL Setup Time of SDIx Data Input to SCKx Edge 20 — — ns SP41 TscH2diL, TscL2diL Hold Time of SDIx Data Input to SCKx Edge 20 — — ns SP50 TssL2scH, TssL2scL SSx to SCKx or SCKx Input 120 — — ns SP51 TssH2doZ SSx to SDOx Output High-Impedance(3) 10 — 50 ns SP52 TscH2ssH TscL2ssH SSx after SCKx Edge 1.5 TCY + 40 — — ns SP60 TssL2doV SDOx Data Output Valid after SSx Edge — — 50 ns Note 1: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 2: The minimum clock period for SCKx is 100 ns. Therefore, the clock generated in Master mode must not violate this specification. 3: Assumes 50 pF load on all SPIx pins. SSx SCKx (CKP = 0) SCKx (CKP = 1) SDOx SP60 SDIx SP30,SP31 MSb Bit 14 - - - - - -1 LSb SP51 Bit 14 - - - -1 LSb In SP35 SP52 SP52 SP73 SP72 SP72 SP73 SP71 SP70 SP40 SP41 SP50 MSb In |
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