64GA106 datasheet(297/330 Pages) MICROCHIP

297 / 330 page

 2010 Microchip Technology Inc.

DS39905E-page 297

PIC24FJ256GA110 FAMILY

FIGURE 28-18:

I2C™ BUS DATA TIMING CHARACTERISTICS (MASTER MODE)

TABLE 28-31: I2C™ BUS DATA TIMING REQUIREMENTS (MASTER MODE)

AC CHARACTERISTICS

Standard Operating Conditions: 2.0V to 3.6V

(unless otherwise stated)

Operating temperature

-40°C

 TA  +85°C (Industrial)

Param

No.

Symbol

Characteristic

Min(1)

Max

Units

Conditions

IM10

TLO:SCL

Clock Low Time 100 kHz mode

TCY/2 (BRG + 1)

—

s—

400 kHz mode

TCY/2 (BRG + 1)

—

s—

1 MHz mode(2)

TCY/2 (BRG + 1)

—

s—

IM11

THI:SCL

Clock High Time 100 kHz mode

TCY/2 (BRG + 1)

—

s—

400 kHz mode

TCY/2 (BRG + 1)

—

s—

1 MHz mode(2)

TCY/2 (BRG + 1)

—

s—

IM20

TF:SCL

SDAx and SCLx

Fall Time

100 kHz mode

—

300

CB is specified to be

from 10 to 400 pF

400 kHz mode

20 + 0.1 CB

300

1 MHz mode(2)

—100

IM21

TR:SCL

SDAx and SCLx

Rise Time

100 kHz mode

—

1000

CB is specified to be

from 10 to 400 pF

400 kHz mode

20 + 0.1 CB

300

1 MHz mode(2)

—300

IM25

TSU:DAT

Data Input

Setup Time

100 kHz mode

250

—

400 kHz mode

100

—

1 MHz mode(2)

TBD

—

IM26

THD:DAT

Data Input

Hold Time

100 kHz mode

—

400 kHz mode

0.9

s

1 MHz mode(2)

TBD

—

IM40

TAA:SCL

Output Valid

From Clock

100 kHz mode

—

3500

—

400 kHz mode

—

1000

—

1 MHz mode(2)

——

—

IM45

TBF:SDA

Bus Free Time

100 kHz mode

4.7

—

s

Time the bus must be

free before a new

transmission can start

400 kHz mode

1.3

—

s

1 MHz mode(2)

TBD

—

s

IM50

Bus Capacitive Loading

—

400

—

Legend:

TBD = To Be Determined

Note 1:

BRG is the value of the I2C Baud Rate Generator. Refer to Section 16.3 “Setting Baud Rate When

Operating as a Bus Master”

for details.

Maximum pin capacitance = 10 pF for all I2C pins (for 1 MHz mode only).

SCLx

SDAx

Out

Note:

Refer to Figure 28-4 for load conditions.

IM11

IM10

IM40

IM26

IM25

IM20

IM21

IM45

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