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AS1323

Datasheet - Application In form atio n

9.3 Capacitor Selection

Choose input and output capacitors to supply the input and output peak currents with acceptable

voltage ripple. The input filter capacitor

recommended.

Note:

Ceramic capacitors have the lowest ESR, but low ESR tantalum or polymer capacitors offer a good balance between cost and perfor-

mance.

Output voltage ripple has two components: variations in the charge stored in the output capacitor with each COIL pulse, and the voltage drop

across the capacitor’s ESR caused by the current into and out of the capacitor:

(EQ 4)

(EQ 5)

Where:

For ceramic capacitors, the output voltage ripple is

inductor typically provide 75mV of output ripple when stepping up from 1.2V to 3.3V at 50mA. Low input-to-output voltage differences require

higher output capacitor values.

Capacitance and ESR variation of temperature should be considered for best performance in applications with wide operating temperature

ranges.

9.4 PC Board Layout Considerations

The AS1323 has been specially designed to be tolerant to PC board parasitic inductances and resistances. However, to achieve maximum

efficiency a careful PC board layout and component selection is vital.

Note:

For the optimal performance, the IC’s VSS and the ground leads of the input and output capacitors must be kept less than 5mm apart

using a ground plane. In addition, keep all connections to COIL as short as possible.

The system robustness guarantees a reliable operation even if those recommendations are not fully applied.

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(EQ 6)