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HS3120 Datasheet(PDF) 2 Page - API Technologies Corp |
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HS3120 Datasheet(HTML) 2 Page - API Technologies Corp |
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2 / 3 page ![]() SPECIFICATIO N S (Typical @ 25ºC, nominal power supply, VREF=+10V, unipolar unless otherwise noted). M ODEL HS3120-2 HS 3120-0 TY PE M ULTIPLY ING, DOUBLE BUFFERED INPUTS DIGITA L INPUT Resolution 12-Bits 2-Quad. Unipolar Coding Binary1, Comp. Binary1 4-Quad. Bipolar Coding Offset Binary Logic Compatibility2 CM OS, TTL Input Current ±1 µA (max) Data Set-up Time3 250nS (min) Strobe W idth3 250nS (min) Data Hold Time3 OnS (min) REFERENCE INPUT V oltage Range ±25V (max) Input Impedance 8k ±50% A NA LOG OUTPUT Scale Factor 125µA /V Ref ±50% Scale Factor A ccuracy4 ±0.4% Output Leakage5 @25ºC <10nA (max) @125ºC <200nA (max) Output Capacitance COUT 1, all inputs high 80pF COUT 1, all inputs low 40pF COUT 2, all inputs high 40pF COUT 2, all inputs low 80pF STA TIC PERFORM A NCE Integral Linearity ±0.015% F.S.R. (max) ±0.05% F.S.R. (max) Differential Linearity ±0.024% F.S.R. (max) ±0.097% F.S.R. (max) M onotonicity Guaranteed to 12 bits Guaranteed to 10 bits M onotonicity Temp. Range C-M odels 0ºC to +70ºC B-M odels –55ºC to +125ºC DY NA M IC PERFORM A NCE Digital Small Signal Settling 1.0µsec Full Scale Transition Settling to 0.01% (strobed) 2.0µsec Reference Feedthrough Error (V Ref=20V pp) @1kHz <1mV @10kHz 2mV Delay to output from Bits input 100nS6 from LDA C 200nS6 from CE 120nS6 STA BILITY (Over Specified Temp. Range) Scale Factor4 2 ppm F.S.R./ºC (max) Integral Linearity 0.2 ppm F.S.R./ºC (max) Differential Linearity 0.2 ppm F.S.R./ºC (max) M onotonicity Temp. Range C-Option 0ºC to +70ºC B-Option –55ºC to +125ºC POW ER SUPPLY (V DD) Operating V oltage (specifications guaranteed) +15V ±5% M aximum V oltage Range +5V to 16V Current 2.5mA (max) Rejection Ratio 0.002% /% (max) TEM PERA TURE RA NGE Operating C-Option 0ºC to +70ºC Operating B-Option 55ºC to +125ºC Storage –65ºC to +150ºC M ECHA NICA L Case Style 28-pin double DIP C-Option ceramic B-Option ceramic NOTES: * Same as HS 3120-2 1. The input coding is complementary binary if IO2 is used. 2. Digital input voltage must not exceed supply voltage or go below –0.5V . “ 0” <0.8V , 2.4V < “ 1” V DD 3. A ll strobes are level triggered. See TIM ING DIA GRA M . 4. Using the internal feedback resistor and an external opamp. 5. The output leakage current will create an offset voltage at the external opamps output. It doubles every 10ºC temperature increase. 6. Delay times are twice the amount shown at TA =+125ºC HS3120 Continued on next page. |
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