ATMEGA161L datasheet(77/134 Pages) ATMEL

77 / 134 page

ATmega161(L)

The Port A pins have alternate functions related to the optional external memory interface. Port A can be configured to be

the multiplexed low-order address/data bus during accesses to the external data memory. In this mode, Port A has internal

pull-up resistors.

When Port A is set to the alternate function by the SRE – External SRAM Enable bit in the MCUCR – MCU Control Regis-

ter, the alternate settings override the data direction register.

Port A Data Register – PORTA

Port A Data Direction Register – DDRA

Port A Input Pins Address – PINA

The Port A Input Pins address – PINA – is not a register, and this address enables access to the physical value on each

Port A pin. When reading PORTA the Port A Data Latch is read, and when reading PINA, the logical values present on the

pins are read.

Port A as General Digital I/O

All 8 pins in Port A have equal functionality when used as digital I/O pins.

PAn, General I/O pin: The DDAn bit in the DDRA register selects the direction of this pin, if DDAn is set (one), PAn is con-

figured as an output pin. If DDAn is cleared (zero), PAn is configured as an input pin. If PORTAn is set (one) when the pin

configured as an input pin, the MOS pull-up resistor is activated. To switch the pull-up resistor off, the PORTAn has to be

cleared (zero) or the pin has to be configured as an output pin. The Port A pins are tri-stated when a reset condition

becomes active, even if the clock is not running.

n: 7,6…0, pin number.

Port A Schematics

Note that all port pins are synchronized. The synchronization latch is however, not shown in the figure.

Bit

654

321

$1B ($3B)

PORTA7

PORTA6

PORTA5

PORTA4

PORTA3

PORTA2

PORTA1

PORTA0

PORTA

Read/Write

R/W

Initial value

Bit

654

321

$1A ($3A)

DDA7

DDA6

DDA5

DDA4

DDA3

DDA2

DDA1

DDA0

DDRA

Read/Write

R/W

Initial value

Bit

654

321

$19 ($39)

PINA7

PINA6

PINA5

PINA4

PINA3

PINA2

PINA1

PINA0

PINA

Read/Write

RRR

Initial value

Hi-Z

Table 28. DDAn Effects on Port A Pins

DDAn

PORTAn

I/O

Pull-up

Comment

Input

Tri-state (Hi-Z)

Input

Yes

PAn will source current if ext. pulled low.

Output

Push-pull Zero Output

Output

Push-pull One Output

ATMEGA161L Datasheet(PDF) 77 Page - ATMEL Corporation

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