ATmega603(L) and ATmega103(L)

2

Block Diagram

Figure 1. The ATmega603/103 Block Diagram

Description

The ATmega603/103 is a low-power CMOS 8-bit microcon-

troller based on the

executing powerful instructions in a single clock cycle, the

ATmega603/103 achieves throughputs approaching 1

MIPS per MHz allowing the system designer to optimize

power consumption versus processing speed.

The AVR core is based on an enhanced RISC architecture

that combines a rich instruction set with 32 general purpose

working registers. All the 32 registers are directly con-

nected to the Arithmetic Logic Unit (ALU), allowing two

independent registers to be accessed in one single instruc-

tion executed in one clock cycle. The resulting architecture

is more code efficient while achieving throughputs up to ten

times faster than conventional CISC microcontrollers.

The ATmega603/103 provides the following features:

64K/128K bytes of In-system Programmable Flash, 2K/4K

bytes EEPROM, 4K bytes SRAM, 32 general purpose I/O

lines, 8 Input lines, 8 Output lines, 32 general purpose

working registers, 4 flexible timer/counters with compare

modes and PWM, UART, programmable Watchdog Timer

with internal oscillator, an SPI serial port and three software

selectable power saving modes. The Idle Mode stops the

CPU while allowing the SRAM, timer/counters, SPI port

and interrupt system to continue functioning. The Power

PROGRAM

COUNTER

INTERNAL

OSCILLATOR

WATCHDOG

TIMER

STACK

POINTER

PROGRAM

FLASH

MCU CONTROL

REGISTER

SRAM

GENERAL

PURPOSE

REGISTERS

INSTRUCTION

REGISTER

TIMER/

COUNTERS

INSTRUCTION

DECODER

DATA DIR.

REG. PORTB

DATA DIR.

REG. PORTE

DATA DIR.

REG. PORTA

DATA DIR.

REG. PORTD

DATA REGISTER

PORTB

DATA REGISTER

PORTE

DATA REGISTER

PORTA

DATA REGISTER

PORTC

DATA REGISTER

PORTD

PROGRAMMING

LOGIC

TIMING AND

CONTROL

OSCILLATOR

OSCILLATOR

INTERRUPT

UNIT

EEPROM

SPI

UART

STATUS

REGISTER

Z

Y

X

ALU

PORTB DRIVER/BUFFERS

PORTE DRIVER/BUFFERS

PORTA DRIVER/BUFFERS

PORTF BUFFERS

ANALOG MUX

ADC

PORTD DRIVER/BUFFERS

PORTC DRIVERS

PB0 - PB7

PE0 - PE7

PA0 - PA7

PF0 - PF7

RESET

VCC

VCC

AGND

GND

GND

AREF

TOSC2

TOSC1

XTAL1

XTAL1

CONTROL

LINES

PD0 - PD7

PC0 - PC7

PEN

ALE

WR

RD

8-BIT DATA BUS

AVCC