AC WAVEFORMS

The shaded areas indicate when the input is permitted to change for predictable output performance.

*The Data Input is DS for S = LOW and Pn for S = HIGH.

Figure 1

Figure 2

Figure 3

Figure 4

D

CP OR

MR

Q

VE

VOUT

VOUT

VE

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

tPLH

tPHL

th(L)

th(H)

1.3 V

1.3 V

1.3 V

≈ 1.3 V

1.3 V

1.3 V

1.3V

≈ 1.3 V

0.5 V

0.5 V

tPZL

tPLZ

VOL

tPZH tPHZ

≥ VOH

*

1/fmax

tW

ts(L)

ts(H)

S

CP

1.3 V

1.3 V

1.3 V

th(L)

th(H)

ts(L)

ts(H)

LOAD SERIAL DATA

SHIFT RIGHT

LOAD PARALLEL DATA

Figure 5

AC LOAD CIRCUIT

SW2

CL*

5 kΩ

SW1

VCC

RL

TO OUTPUT

UNDER TEST

SWITCH POSITIONS

* Includes Jig and Probe Capacitance.

5-554

FAST AND LS TTL DATA

SN74LS395

SYMBOL

SW1

SW2

tPZH

Open

Closed

tPZL

Closed

Open

tPLZ

Closed

Closed

tPHZ

Closed

Closed