CS4334 datasheet(13/26 Pages) CIRRUS

13 / 26 page

CS4334/5/6/7/8/9

DS248PP3

The interpolation filters and delta-sigma modula-

tors are reset, and the internal voltage reference,

one-bit digital-to-analog converters and switched-

capacitor low-pass filters are powered down. The

device will remain in the Power-Down mode until

MCLK and LRCK are present. Once MCLK and

LRCK are detected, MCLK occurrences are count-

ed over one LRCK period to determine the

MCLK/LRCK frequency ratio. Power is then ap-

plied to the internal voltage reference. Finally, pow-

er is applied to the D/A converters and switched-

capacitor filters, and the analog outputs will ramp to

the quiescent voltage, VQ.

4.5 Output Transient Control

The CS4334 family uses Popgaurd

® technology to

minimize the effects of output transients during

power-up and power-down. This technique elimi-

nates the audio transients commonly produced by

single-ended single-supply converters when it is

implemented with external DC-blocking capacitors

connected in series with the audio outputs.

make best use of this feature, it is necessary to un-

derstand its operation.

When the device is initially powered-up, the audio

outputs, AOUTL and AOUTR, are clamped to

AGND. After a short delay of approximately 1000

sample periods, each output begins to ramp to-

wards its quiescent voltage, VQ. Approximately

10,000 sample cycles later, the outputs reach VQ

and audio output begins. This gradual voltage

ramping allows time for the external DC-blocking

capacitor to charge to VQ, effectively blocking the

quiescent DC voltage.

To prevent transients at power-down, the device

must first enter its power-down state. This is ac-

complished by removing MCLK or LRCK. When

this occurs, audio output ceases and the internal

output buffers are disconnected from AOUTL and

AOUTR. A soft-start current sink is substituted in

place of AOUTL and AOUTR which allows the

DC-blocking capacitors to slowly discharge. Once

this charge is dissipated, the power to the device

may be turned off, and the system is ready for the

next power-on.

To prevent an audio transient at the next power-on,

the DC-blocking capacitors must fully discharge

before turning off the power or exiting the power-

down state. If full discharge does not occur, a tran-

sient will occur when the audio outputs are initially

clamped to AGND. The time that the device must

remain in the power-down state is related to the

value of the DC-blocking capacitance. For exam-

ple, with a 3.3

µF capacitor, the time that the device

must remain in the power-down state will be ap-

proximately 0.4 seconds.

4.6 Grounding and Power Supply

Decoupling

As with any high resolution converter, the CS4334

family requires careful attention to power supply

and grounding arrangements to optimize perfor-

mance. Figure 7 shows the recommended power ar-

rangement with VA connected to a clean +5V

supply. For best performance, decoupling capaci-

tors should be located as close to the device pack-

age as possible with the smallest capacitor closest.

4.7 Analog Output and Filtering

The analog filter present in the CS4334 family is a

switched-capacitor filter followed by a continuous

time low pass filter. Its response, combined with

that of the digital interpolator, is given in Figures

17 - 24.

Gain

-10dB

0dB

Frequency

T2 = 15 µs

T1=50 µs

3.183 kHz

10.61 kHz

Figure 9. De-Emphasis Curve (Fs = 44.1kHz)

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