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CS5181 Datasheet(PDF) 15 Page - Cirrus Logic |
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CS5181 Datasheet(HTML) 15 Page - Cirrus Logic |
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15 / 24 page ![]() CS5181 DS250PP1 15 PIN DESCRIPTIONS Analog Ground AGND Pos. Reference VREF+ VA1+ Positive Analog Supply Neg. Reference VREF- AIN- Negative Analog Input Reference Output VREFOUT AIN+ Positive Analog Input Pos. Reference Input VREFIN PWDN Power Down Mode Reference Bypass VREFCAP MODE Modulator Only Mode Analog Ground AGND RESET Reset and Calibration Analog Supply VA2+ DGND Digital Ground Invalid Conversion MFLAG VD1+ Positive Digital Supply Sync. Filter SYNC MCLK Master Clock Digital Ground DGND MCLK Inverse Master Clock Pos. Digital Supply VD2+ AGND Analog Ground Inverse Serial Clock SCLK FSO Frame Sync Output Serial Clock SCLK SDO Serial Data Out SDO Inverse Serial Data Out\ CS5181 1 2 3 428 27 26 5 6 7 8 9 10 11 12 13 14 15 16 17 19 20 21 22 23 24 25 18 AGND Analog Ground Analog Ground AGND VA1+ Positive Analog Supply Pos. Reference VREF+ AGND Analog Ground Neg. Reference VREF- AIN- Negative Analog Input Reference Output VREFOUT AIN+ Positive Analog Input Analog Ground AGND AGND Analog Ground Analog Ground AGND PWDN Power Down Mode Reference Input VREFIN MODE Modulator Only Mode Reference Bypass VREFCAP RESET Reset and Calibration Analog Ground AGND DGND Digital Ground Analog Ground AGND DGND Digital Ground Analog Supply VA2+ VD1+ Positive Digital Supply Analog Supply VA2+ VD1+ Positive Digital Supply Invalid Conversion MFLAG DGND Digital Ground Sync. Filter SYNC MCLK Master Clock Digital Ground DGND MCLK Inverse Master Clock Digital Ground DGND DGND Digital Ground Pos. Digital Supply VD2+ NC Pos. Digital Supply VD2+ AGND Analog Ground Digital Ground DGND NC Inverse Serial Clock SCLK FSO Frame Sync Output Serial Clock SCLK SDO Serial Data Out SDO Inverse Serial Data Out\ 1 2 3 4 5 6 7 8 9 10 11 12131415 16171819202122 33 32 31 30 29 28 27 26 25 24 23 4443424140393837363534 CS5181 |
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