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EM5103 Datasheet(PDF) 2 Page - Cystech Electonics Corp. |
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EM5103 Datasheet(HTML) 2 Page - Cystech Electonics Corp. |
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2 / 12 page ![]() CYStech Electronics Corp. Spec. No. : C554QP Issued Date : 2010.11.17 Revised Date : Page No. : 2/12 EM5103 CYStek Product Specification Typical Application Circuit PSOP-8 DFN3×3-10L Pin Assignment Pin No. Pin Name PSOP-8 DFN3×3-10L Pin Function POK 1 5 Power OK Indication. POK is an open-drain output. An external pull high resistor connected to this pin is required. EN 2 6 Enable Input. Pulling the pin below 0.4V turns the regulator off. VIN 3 7,8,9 Input Voltage. This is the drain input to the power device that supplies current to the output pin. VIN cannot be forced higher than VCNTL. CNTL 4 10 Supply Input for Control Circuit. CNTL provides supply voltage to the control circuitry and driver for the pass transistor. The driving capability of output current is proportioned to the VCNTL. For the device to regulate, the voltage on this pin must be at least 2.0V greater than the output voltage, and no less than VCNTL_MIN. NC 5 - No Connection inside chip. VOUT 6 1,2,3 Output Voltage. VOUT is power output pin. An internal pull low resistance exists when the device is disabled. Minimum 22μF low ESR ceramic holding capacitor is required at this pin for stabilizing VOUT voltage. FB 7 4 Feedback Voltage. FB is the inverting input to the error amplifier. A resistor divider from the output to GND is used to set the regulation voltage as VOUT = (1 + R1/R2) × 0.8V (V). This pin has high impedance and should be kept from noisy source to guarantee stable operation. GND 8 11 Ground. |
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