DS1990 datasheet(10/10 Pages) DALLAS

10 / 10 page

DS1990A

10 of 10

NOTES:

1. All voltages are referenced to ground.

2. VPUP = external pullup voltage.

3. Input load is to ground.

4. An additional reset or communication sequence cannot begin until the reset high time has expired.

5. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is

guaranteed to be valid within 1

µs of this falling edge and will remain valid for 14 µs minimum. (15

µs total from falling edge on 1-Wire bus.)

6. VIH is a function of the external pullup resistor and the VCC supply.

7. 30 nanocoulombs per 72 time slots @ 5.0V.

8. At VCC =5.0V with a 5 k

Ω pullup to V CC and a maximum time slot of 120 µs.

9. Capacitance on the I/O pin could be 800 pF when power is first applied. If a 5 k

Ω resistor is used to

pull up the I/O line to VCC , 5

µs after power has been applied the parasite capacitance will not affect

normal communications.

10. The reset low time (tRSTL ) should be restricted to a maximum of 960

µs, to allow interrupt signaling,

otherwise, it could mask or conceal interrupt pulses if this device is used in parallel with a DS1994.

DS1990 Datasheet(PDF) 10 Page - Dallas Semiconductor