DS2180A datasheet(4/35 Pages) DALLAS

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DS2180A

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POWER AND TEST PIN DESCRIPTION (40-PIN DIP ONLY) Table 3

SYMBOL

TYPE

DESCRIPTION

VSS

Signal Ground.

0.0 volts.

TEST

Test Mode.

Tie to VSS for normal operation.

VDD

Positive Supply.

5.0 volts.

RECEIVE PIN DESCRIPTION (40-PIN DIP ONLY) Table 4

SYMBOL

TYPE

DESCRIPTION

RYEL

Receive Yellow Alarm.

Transitions high when yellow alarm detected, goes low

when alarm clears.

RLINK

Receive Link Data.

Updated with extracted FDL data one RCLK before start of

odd frames (193E) and held until next update. Updated with extracted S-bit data one

RCLK before start of even frames (193S) and held until next update.

RLCLK

Receive Link Clock.

4 kHz demand clock for RLINK.

RCLK

Receive Clock.

1.544 MHz primary clock.

RCHCLK

Receive Channel Clock.

192 kHz clock identifies time slot (channel) boundaries.

RSER

Receive Serial Data.

Received NRZ serial data, updated on rising edges of RCLK.

RFSYNC

Receive Frame Sync.

Extracted 8 kHz clock, one RCLK wide, indicates F-Bit

position in each frame.

RMSYNC

Receive Multiframe Sync.

Extracted multiframe sync; edge indicates start of

multiframe, 50% duty cycle.

RABCD

Receive ABCD Signaling.

Extracted signaling data output, valid for each channel

time in signaling frames. In non-signaling frames, RABCD outputs the LSB of each

channel word.

RSIGFR

Receive Signaling Frame.

High during signaling frames, low during resync and

non-signaling frames.

RSIGSEL

Receive Signaling Select.

In 193E framing a .667 kHz clock which identifies

signaling frames A and C. A 1.33 kHz clock in 193S.

RST

Reset.

A high-low transition clears all internal registers and resets receive side

counters. A high-low-high transition will initiate a receive resync.

RPOS

RNEG

Receive Bipolar Data Inputs.

Samples on falling edge of RCLK. Tie together to

receive NRZ data and disable bipolar violation monitoring circuitry.

RCL

Receive Carrier Loss.

High if 32 consecutive 0's appear at RPOS and RNEG; goes

low after next 1.

RBV

Receive Bipolar Violation.

High during accused bit time at RSER if bipolar

violation detected, low otherwise.

RFER

Receive Frame Error.

High during F-Bit time when FT or FS errors occur (193S)

or when FPS or CRC errors occur (193E). Low during resync.

RLOS

Receive Loss of Sync.

Indicates sync status; high when internal resync is in

progress, low otherwise.

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