DS2181A datasheet(4/32 Pages) DALLAS

4 / 32 page

DS2181A

4 of 32

NOTES:

1. These output status pins are only available on the DS2181AQ.

2. If the TEST pin is tied low and CCR.1=0, then these pins will be tri–stated.

RECEIVE PIN DESCRIPTION (40-PIN DIP ONLY) Table 2B

SYMBOL

TYPE

DESCRIPTION

RRA

Receive Remote Alarm. Transitions high when alarm detected;

returns low when alarm cleared.

RMDA

Receive Distant Multiframe Alarm. Transitions high when alarm

detected; returns low when alarm cleared.

RAF

Receive Alignment Frame. High during frames containing the frame

alignment signal, low otherwise.

RCLK

Receive Clock. 2.048 MHz primary clock.

RCHCLK

Receive Channel Clock. 256 kHz clock, identifies timeslot

boundaries; useful for serial-to-parallel conversion of channel data.

RSER

Receive Channel Clock. 256 kHz clock, identifies timeslot

boundaries; useful for serial-to-parallel conversion of channel data.

RFSYNC

Receive Frame Sync. Trailing edge indicates start of frame.

RMSYNC

Receive Multiframe Sync. Low-high transition indicates start of

CAS multiframe; held high during frame 0.

RSD

Receive Signaling Data. Extracted timeslot 16 data; updated on

rising edge of RCLK.

RSTS

Receive Signaling Timeslot. High during timeslot 16 of every frame,

low otherwise.

RCSYNC

Receive CRC4 Sync. Low-high transition indicates start of CRC4

multiframe; held high during CRC4 frames 0 through 7 and held low

during frames 8 through 15.

RST

Reset. Must be asserted during device power-up and when changing

to/from the hardware mode.

RPOS

RNEG

Receive Bipolar Data. Sampled on falling edges of RCLK. Tie

together to receive NRZ data and disable BPV monitor circuitry.

RCL

Receive Carrier Loss. Low-high transition indicates loss of carrier.

RBV

Receive Bipolar Violation. Pulses high during detected bipolar

violations.

RFER

Receive Frame Error. Pulses high when frame alignment, CAS

multiframe alignment or CRC4 words received in error.

RLOS

Receive Loss of Sync. Indicates synchronizer status; high when

frame, CAS and/or CRC4 multiframe search underway, low

otherwise.

DS2181A Datasheet(PDF) 4 Page - Dallas Semiconductor

DS2181A Datasheet(HTML) 4 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL