1. General description

The 74LVC86A provides four 2-input EXCLUSIVE-OR functions. It is a high-performance,

low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS

compatible TTL families.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in mixed 3.3 V and 5 V applications.

2. Features

5 V tolerant inputs for interlacing with 5 V logic

Supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Direct interface with TTL levels

Complies with JEDEC standard JESD8-B / JESD36

ESD protection:

HBM JESD22-A114-C exceeds 2000 V

CDM JESD22-C101-C exceeds 1000 V

Specified from

−40 °C to +85 °C and −40 °C to 125 °C

3. Ordering information

74LVC86A

Quad 2-input EXCLUSIVE-OR gate

Rev. 05.00 — 15 May 2006

Product data sheet

Table 1:

Ordering information

Type number

Package

Temperature

range

Name

Description

Version

74LVC86AD

−40 °C to +125 °C SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74LVC86ADB

−40 °C to +125 °C SSOP14

plastic shrink small outline package; 14 leads;

body width 5.3 mm

SOT337-1

74LVC86APW

−40 °C to +125 °C TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

74LVC86ABQ

−40 °C to +125 °C DHVQFN14

plastic dual in-line compatible thermal enhanced very thin

quad flat package; no leads; 14 terminals;

body 2.5

× 3 × 0.85 mm

SOT762-1