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EM78P458AM Datasheet(PDF) 9 Page - ELAN Microelectronics Corp |
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EM78P458AM Datasheet(HTML) 9 Page - ELAN Microelectronics Corp |
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9 / 76 page ![]() EM78P458/459 OTP ROM • "JMP" instruction allows the direct loading of the lower 10 program counter bits. Thus, "JMP" allows PC to jump to any location within a page. • "CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed into the stack. Thus, the subroutine entry address can be located anywhere within a page. • "RET" ("RETL k", "RETI") instruction loads the program counter with the contents of the top of stack. • "ADD R2, A" allows a relative address to be added to the current PC, and the ninth and tenth bits of the PC are cleared. • "MOV R2, A" allows to load an address from the "A" register to the lower 8 bits of the PC, and the ninth and tenth bits of the PC are cleared. • Any instruction that is written to R2 (e.g. "ADD R2, A", "MOV R2, A", "BC R2, 6", ⋅⋅⋅⋅⋅) will cause the ninth bit and the tenth bit (A8~A9) of the PC to be cleared. Thus, the computed jump is limited to the first 256 locations of a page. • In the case of EM78P458/459, the most two significant bits (A11 and A10) will be loaded with the content of PS1 and PS0 in the status register (R3) upon the execution of a "JMP", "CALL", or any other instructions set which write to R2. • All instructions are single instruction cycle (fclk/2 or fclk/4) except for the instructions which write to R2, need one more instruction cycle. A9 ~ A0 Stack Level 0 Stack Level 2 Stack Level 1 Stack Level 3 Stack Level 4 000H FFFH 008H Interrupt Vector Reset Vector A11, A10 On-chip Program Memory PC Page 0 Page 1 Page 2 Page 3 00 01 10 11 Stack Level 5 Stack Level 6 Stack Level 7 0 0 0 3 F F 4 0 0 7 F F 8 0 0 B F F C 0 0 F F F Fig. 3 Program Counter Organization This specification is subject to change without prior notice. 06.25.2004 (V1.4) 9 |
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