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RM24EP64 Datasheet(PDF) 9 Page - List of Unclassifed Manufacturers

Part # RM24EP64
Description  32/64/128-Kbit 2.7V Minimum Sterilization-Tolerant Boot Memory
PDF  17 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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RM24EP64 Datasheet(HTML) 9 Page - List of Unclassifed Manufacturers

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9
RM24EP
DS-RM24EP–048C–6/2014
Figure 9-1.
Acknowledge Polling Flow
10.
Read Operation
Read operations are initiated in the same way as the write operations, except that the R/W bit of the control byte is set to
one. There are three types of read operations: Current Address Read, Random Read, and Sequential Read.
10.1
Current Address Read
The device internal address pointer maintains the address of the last word accessed, internally incremented by one.
Therefore, if the previous read access was to address n (any legal address), the next Current Address Read operation
would access data from address n+1. For the 128-Kbit device, if the previous read access was to address 3FFFh, the
incremented address will wrap around to 0000h. For the 64-Kbit device the rollover occurs at address 01FFFh and for the
32-Kbit device the rollover occurs at 0FFFh.
If a Current Address Read is performed after a Byte Write or Page Write, care must be taken to understand that during
the page/byte write command, the address can wrap around within the same page.
Upon receipt of the control byte with the R/W bit set to one, the device issues an acknowledge and transmits the 8-bit
data word located at the address of the internal address pointer. The master will not acknowledge the transfer, but does
generate a STOP condition and the device discontinues transmission. See Figure 10-1.
Figure 10-1. Current Address Read



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