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ACT6390 Datasheet(PDF) 6 Page - Active-Semi, Inc |
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ACT6390 Datasheet(HTML) 6 Page - Active-Semi, Inc |
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6 / 12 page  ACT6390/ACT6391 Rev 1, 22-Aug-13 Innovative PowerTM - 6 - www.active-semi.com Copyright © 2013 Active-Semi, Inc. (9) (11) Inductor Selection As a step-up converter, the switch duty cycle (D) is determined by the input voltage (VIN) and output voltage (VOUT), as given by the following formula: Define Where: ∆IL is the inductor ripple current in steady state, typically chosen to be about 0.3, and IL(DC) is the inductor DC current, given by: Where η is typical efficiency. Solving equations (3),(4),(5) and (6) for the inductor value, This equation can be used to determine the correct trade-off between efficiency, current ripple, size and cost. When selecting an inductor make sure that the in- ductors maximum DC current and saturation current exceed the maximum operation point, calculated by: and If the output voltage is greater than two times of input voltage, that means the duty cycle is greater than 50%, the slope compensation is required for stability. When operating in this condition ensure that the inductor value is greater than LMIN: Where RCS is the current sense trans-resistance, RCS is 0.45Ω for ACT6390, and RCS = 0.3Ω for ACT6391. For example: VIN = 3.3V, VOUT = 12V, fSW = 700kHz IOUT = 250mA, η = 85%, FREQ = G, K = 0.4 Select L = 10µH Assuming the minimum input voltage is 3V and low cost external components are used, yielding a low efficiency of just 80%. For stability, Which meets the slope compensation requirement. Loop Compensation The ACT6390 and ACT6391 feature a simple loop compensation scheme. Simple follow the procedure detailed below to determine suitable compensation components. For best results be sure to prototype to confirm the values, and adjust the compensation network (by inspecting the transient response, for example) as needed to optimize results for your particular application. When the converter operates with continuous in- ductor current, a right-half-plane zero exits in the loop’s gain-frequency response. To ensure stability, OUT IN OUT V V V D − = (3) (4) SW IN IN L f L D V DT L V I Δ × × = = (5) (6) () η V I V I IN OUT OUT DC L × × = () () () η V V I I MIN IN OUT MAX OUT MAX , DC L × × = (8) (12) (15) 2 REF FB GM COMP CCOMP2 CCOMP RCOMP EA - + 3 (10) ( ) SW CS IN OUT MIN f 75 . 1 R V V L L × × − = > () DC L L I I Δ K = (7) () K η f I V V V V L SW OUT IN OUT 2 OUT IN × × − ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ = (14) () A 41 . 1 A 32 . 0 2 1 A 25 . 1 I MAX PEAK = + = () ( ) () () () () () [] SW OUT MIN IN OUT MIN IN MIN IN OUT MAX OUT MAX L MAX , DC L MAX , PEAK L f L V V V V 2 1 η V V I I Δ 2 1 I I × × − × + × × = + = H μ 99 . 7 4 . 0 85 . 0 kHz 700 mA 250 V 3 . 3 V 12 V 12 V 3 . 3 K η f I V V V V L 2 SW OUT IN OUT 2 OUT IN ≈ ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ × × − ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ = × ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ × − ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ = () A 25 . 1 8 . 0 V 3 V 12 mA 250 I MAX , DC L = × × = (13) () ( ) A 32 . 0 kHz 700 H μ 10 V 12 V 3 V 12 V 3 I Δ MAX L = × × − × = ( ) H μ 2 . 3 kHz 700 75 . 1 Ω 45 . 0 V 3 . 3 V 12 L MIN = × × − = |
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