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HM628512CLFP-7SL Datasheet(PDF) 1 Page - Hitachi Semiconductor |
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HM628512CLFP-7SL Datasheet(HTML) 1 Page - Hitachi Semiconductor |
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1 / 17 page ![]() Preliminary: The specification of this device are subject to change without notice. Please contact your nearest Hitachi’s Sales Dept. regarding specification. HM628512C Series 4 M SRAM (512-kword × 8-bit) ADE-203-1212 (Z) Preliminary Rev. 0.0 Sep. 12, 2000 Description The Hitachi HM628512C is a 4-Mbit static RAM organized 512-kword × 8-bit. It realizes higher density, higher performance and low power consumption by employing Hi-CMOS process technology. The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II or 600-mil plastic DIP, is available for high density mounting. The HM628512C is suitable for battery backup system. Features • Single 5 V supply • Access time: 55/70 ns (max) • Power dissipation Active: 50 mW/MHz (typ) Standby: 10 µW (typ) • Completely static memory. No clock or timing strobe required • Equal access and cycle times • Common data input and output: Three state output • Directly TTL compatible: All inputs and outputs • Battery backup operation |
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