D. Pin Assignment —

E. Pad Assignment & Position —

C h ip Siz e : 64

* The IC substrate should be connected to VDD in PCB layout artwork.

Un it: mil

Pad No.

Symbol

x

Y

Pad No.

Symbol

X

Y

1

OUT1

–21.09

–20.9

7

OSC2

26.55

26.5

2

OUT2

–9.89

–20.9

8

VDD

13.35

26.5

3

OUT3

1.31

–20.9

9

TEST

6.15

26.5

4

OUT4

12.51

–20.9

10

OPT

–10.89

26.5

5

OUT5

23.71

–20.9

11

ON/OFF

–26.25

26.5

6

OSC1

26.23

13.3

12

VSS

–26.25

10.98

HT— 2050

DEC.29.1993

FIVE LAMP/LED FLASH DRIVER

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