Pin Assignment

Pin Description

Pin Name I/O

Internal

Connection

Description

A0~A11

I

TRANSMISSION

GATE

Input pins for address A0~A11 setting

They can be externally set to VDD, VSS, or left open.

AD10~AD17

I

TRANSMISSION

GATE

Input pins for address/data (AD10~AD17) setting

They can be externally set to VDD, VSS, or left open.

D12~D15

I

CMOS IN

Pull-low

Input pins for data (D12~D15) setting and transmission

enable (active high)

They an be externally set to VDD or left open (see Note).

DOUT

O

CMOS OUT

Encoder data serial transmission output

LED

O

NMOS OUT

LED transmission enable indicator

TE

I

CMOS IN

Pull-low

Transmission enable, active high (see Note).

OSC1

I

OSCILLATOR

Oscillator input pin

OSC2

O

OSCILLATOR

Oscillator output pin

VSS

¾¾

Negative power supply, ground

VDD

¾¾

Positive power supply

Note: D12~D15 are data input and transmission enable pins of the HT6207.

TE is the transmission enable pin of the HT600/HT680.

HT600/680/6207

3

April 24, 2000

9 - A ddr e s s

5 -A d d r e s s / D a ta

HT 6 0 0

20 D I P / S O P

TE t r i gge r t y pe

8 - A ddr e s s

4- A d d r ess/ D a t a

HT 6 8 0

18 D I P / S O P

VD D

A9

A8

A7

A6

A3

A2

A1

A0

18

17

16

15

14

13

12

11

10

1

2

3

4

5

6

7

8

9

AD 1 1

AD 1 2

AD 1 4

AD 1 5

DO UT

TE

OS C 2

OS C 1

VS S

VD D

A9

A8

A7

A6

A4

A3

A2

A1

A0

20

19

18

17

16

15

14

13

12

11

1

2

3

4

5

6

7

8

9

10

AD 1 1

AD 1 2

AD 1 3

AD 1 4

AD 1 5

DO UT

TE

OS C 2

OS C 1

VS S

DAT A t r i g g e r t y p e

10- A d d r ess

4 - D a t a

H T 6207

2 0 D I P/ SO P

A1 1

D1 2

D1 3

D1 4

D1 5

DO UT

LE D

OS C 2

OS C 1

VS S

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

VD D

A9

A8

A7

A6

A4

A3

A2

A1

A0