HDM8513AT datasheet(39/67 Pages) HYNIX

39 / 67 page

5.3 Monitor and Control Interface

Three different modes are supported for the monitor and control interface. Two of the modes are 8

bit parallel interfaces, one which supports Intel microcontrollers and the other intended for Motorola

microcontrollers. The third mode is a serial interface conforming to the I2C standard.

The I2C mode is activated by placing BUSMODE high at the same time both /RE and /WE are low

simultaneously. When this mode is active, the seven bit I2C slave address of the HDM8513A is

configured by the seven least significant bits of the HI_DATA[7:0] bus.

HI_DATA [7:0]

This bi-directional data bus is used for transferring control parameters to

the demodulator and for reading the status registers within the

demodulator.

/CE

Chip enable is an active low input to the demodulator which signifies that

the other control signals are active.

/RE

Read Enable is an active low input to the device which, when active at the

same time chip enable is true, permits the device to drive the HI_DATA

[7:0] lines. When BUSMODE is 0 (Motorola), this pin is read / not write

(see timing diagrams).

/WE

Write enable is an active low input to the device which, when true at the

same time chip enable is true, causes input data on the HI_DATA [7:0] bus

to be transferred to the register defined by the HI_ADDR [4:0] bus. When

BUSMODE is 0 (Motorola), this pin is not data strobe (see timing

diagrams).

HI_ADDR [4:0]

The address bus defines which location within the device is to be accessed

during a read or write operation.

BUSMODE

BUSMODE selects the type of microcontroller/processor used to setup the

chip. When high, an Intel processor/microcontroller interface is used.

When low, a Motorola processor interface is used.

DTACK

Data Acknowledge/Data Ready is a tristate output signal which informs

the controlling processor that a data transfer has been acknowledged by

the HDM8513A.

SCL_I2C

This pin provides the clock for the I2C interface when that mode is active.

SDA_I2C

This pin is the data for the I2C interface and requires an external pull-up

resistor as per the I2C standard.

SDA_I2CO

This pin, which can be by-passed, is the data for the I2C interface.

SCL_I2CO

This pin, which can be by-passed, provides the clock for the I2C interface.

HDM8513AT Datasheet(PDF) 39 Page - Hynix Semiconductor

HDM8513AT Datasheet(HTML) 39 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67

Datasheet Download

Link URL