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HDM8515P Datasheet(PDF) 48 Page - Hynix Semiconductor

Part # HDM8515P
Description  DVB/DSS Compliant Receiver
PDF  75 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HDM8515P Datasheet(HTML) 48 Page - Hynix Semiconductor

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6. Register Definitions
6.1 Write Registers
ADDRESS (Hex)
00, 01, 02
Symbol Timing Frequency
The 20 bit straight binary number in this field establishes the symbol
timing frequency utilized within the demodulator. Bit 7 of address 00 is
the MSB and bit 4 of address 02 is the LSB. If Rs is the symbol rate
and fc is the clock frequency, the value to be stored in this 20 bit field is
the integer portion of Rs(2
20)/fc.
03
Symbol Timing Loop Gain Control
This field establishes the K1 and K2 gain values for the second order
loop filter of the symbol tracking loop. Bits 0,1,2 and 3 determine the
straight-through gain, and bits 4,5,6 and 7 determine the integration
path gain. The nominal value of this parameter in Hex, is expressed
below for different ranges of symbol rate to clock rate ratios:
Clock/Symbol Rate
Value
2
FB
4
DA
8
B9
16
98
32
77
64
56
04, 05, 06
Carrier Frequency
The 20 bit, two's complement number in this field establishes the
nominal carrier frequency of the demodulator. Bit 7 of address 04 is the
MSB and bit 4 of address 06 is the LSB. The number in this 20 bit field
multiplied by the clock frequency divided by 2
20 is the carrier frequency
in Hertz. When the carrier sweep function is active, this value defines
the starting frequency.



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