ICS581-01, -02

Zero-Delay Glitch-Free Clock Multiplexer

MDS 581-01, 581-02 A

2

Revision 041100

Printed 11/14/00

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com

Pin Assignment

1

8

9

16

2

3

4

5

6

7

10

11

12

13

14

15

CLK4

CLK1

VDD

CLK2

CLK3

S0

S1

FBIN

GND

INA

INB

VDD

OE0

GND

SELA

OE1

VDD

1

8

9

16

2

3

4

5

6

7

10

11

12

13

14

15

CLK4

CLK1

VDD

CLK2

CLK3

S0

S1

FBIN

GND

INA

INB

OE0

GND

DIV

OE1

SELA

CLK1:4

0

INB

1

INA

Clock Decoding

ICS581-01 only

DIV

Nominal Timeout

0

3xPeriod of INB

1

48xPeriod of INB

Timeout Selection

ICS581-02 only

Tri-State and Power Down

OE1

OE0

CLK1

CLK2,3,4

PLL

0

0

Z

Z

Off

0

1

On

Z

On

1

0

Z

On

On

1

1

On

On

On

ICS581-01,-02

Pin Descriptions

Key: I = Input; O = output; P = power supply connection

Number

Name

Type

Chip

Description

1

S0

I

-01, -02

Select 0 for frequency range. See table. Internal pull-up.

2

S1

I

-01, -02

Select 1 for frequency range. See table. Internal pull-up.

3

VDD

P

-01, -02

Connect to +3.3 V or + 5 V.

4

INA

I

-01, -02

Input Clock A.

5

INB

I

-01, -02

Input Clock B.

6

GND

P

-01, -02

Connect to ground.

7

FBIN

I

-01, -02

Feedback input. Connect to a clock output.

8

OE0

I

-01, -02

Output Enable0. See Table. Internal pull-up.

9

OE1

I

-01, -02

Output Enable1. See Table. Internal pull-up.

10

GND

P

-01, -02

Connect to ground.

11

CLK4

O

-01, -02

Low skew clock output.

12

CLK3

O

-01, -02

Low skew clock output.

13

CLK2

O

-01, -02

Low skew clock output.

14

CLK1

O

-01, -02

Low skew clock output.

15

VDD

P

-01, -02

Connect to +3.3 V or + 5 V.

16

SELA

I

-01 only

Mux select. Selects INA when high. Internal pull-up.

16

DIV

I

-02 only

Timeout select. See table. Internal pull-up.

S1

S0

Input Range (MHz)

0

0

50-150

0

1

19-75

1

0

6-19

1

1

150-200

Frequency Range Select

ICS581-01,-02