ICS8533-11 datasheet(1/15 Pages) ICST

Part #	ICS8533-11

Description	LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER

PDF	15 Pages

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Manufacturer	ICST [Integrated Circuit Systems]

Direct Link	http://www.icst.com

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1 / 15 page

8533AG-11

www.icst.com/products/hiperclocks.html

REV. D

JULY 16, 2001

1

Integrated

Circuit

Systems, Inc.

ICS8533-11

LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/

DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER

GENERAL DESCRIPTION

The ICS8533-11 is a low skew, high performance

1-to-4 Crystal Oscillator/Differential-to-3.3V

LVPECL fanout buffer and a member of the

HiPerClockS™ family of High Performance Clock

Solutions from ICS. The ICS8533-11 has select-

able differential clock or crystal inputs. The CLK, nCLK pair

can accept most standard differential input levels. The clock

enable is internally synchronized to eliminate runt pulses on

the outputs during asynchronous assertion/deassertion of the

clock enable pin.

Guaranteed output and part-to-part skew characteristics

make the ICS8533-11 ideal for those applications demand-

ing well defined performance and repeatability.

FEATURES

• 4 differential 3.3V LVPECL outputs

• Selectable CLK, nCLK or crystal inputs

• CLK, nCLK pair can accept the following differential input

levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL

• Maximum output frequency up to 650MHz

• Translates any single-ended input signal to 3.3V

LVPECL levels with resistor bias on nCLK input

• Output skew: 30ps (maximum)

• Part-to-part skew: 150ps (maximum)

• Propagation delay: 2ns (maximum)

• 3.3V operating supply

• 0°C to 70°C ambient operating temperature

• Industrial temperature information available upon request

BLOCK DIAGRAM

PIN ASSIGNMENT

ICS8533-11

20-Lead TSSOP

6.5mm x 4.4mm x 0.92 Package Body

G Package

Top View

VEE

CLK_EN

CLK_SEL

CLK

nCLK

XTAL1

XTAL2

nc

VCC

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

Q0

nQ0

VCC

Q1

nQ1

Q2

nQ2

VCC

Q3

nQ3

HiPerClockS™

,&6

CLK

nCLK

XTAL1

XTAL2

Q0

nQ0

Q1

nQ1

Q2

nQ2

Q3

nQ3

0

1

CLK_EN

CLK_SEL

D

Q

LE

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