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ICS9120-56 Datasheet(PDF) 3 Page - Integrated Circuit Systems

Part # ICS9120-56
Description  Frequency Timing Generator for EtherNet & Hard Drives
PDF  5 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9120-56 Datasheet(HTML) 3 Page - Integrated Circuit Systems

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ICS9120-56
Electrical Characteristics at 3.3 V
VDD = +3.0 to +3.7 V, TA = 0
OC-70oC unless otherwise stated
1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
2: For direct drive of X1 input.
3. 1ms Ramp @ 1.4V to 1
st crossing.
Absolute Maximum Ratings
Supply Voltage .......................................................................................................... 7.0 V
Logic Inputs ....................................................................... GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature ............................................................. 0°C to +70°C
Storage Temperature ........................................................................... –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only and functional operation of the device at these or any other conditions above those listed
in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
DC Characteristics
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Low Voltage
1, X12
VIL
0.8
V
Input High Voltage
1, X12
VIH
2.0
V
Output Low Voltage
VOL
IOL=6.0mA
0.05VDD
0.1VDD
V
Output High Voltage
VOH
IOH=4.0mA
0.85VDD
0.94VDD
V
Output Low Current
IOL
VOL=0.2VDD
15.0
24
mA
Output High Current
IOH
VOH=0.7VDD
-13
-8.0
mA
Supply Current
IDD
Unloaded VDD 5.5V
16
30.0
mA
AC Characteristics
Rise Time
1
Tr
15pF load 0.8 to 2.0V
2.3
ns
Fall Time
1
Tf
15pF load 2.0 to 0.8V
0.8
1.5
ns
Duty Cycle
1
Dt
15pF load @ 1.5V VDD
Except REFCLK
45
50
55
%
Duty Cycle
1
Dt
15pF load @ 1.5V VDD
Except REFCLK
55
6
65
%
Jitter, One Sigma1
Tjis
For all frequencies except
REFCLK
120
200
ps
Jitter Absolute
1
Tjab
For all frequencies except
REFCLK
-500
310
500
ps
Jitter, One Sigma
1
Tjis
REFCLK only
0.9
3
%
Jitter Absolute
1
Tjab
REFCLK only
1.9
4
%
Input Frequency1
FI
1
30
MHz
Output Frequency Range
1
Fo
1.6
48
MHz
Output Mean Frequency
1
Accuracy vs. Target
Foa
With 25.00MHz input
-100
0
100
ppm
Power-up Time
1,3
Tpu
0 to 40.0 MHz/1ms Ramp.
7
10
ms
Crystal Input Capacitance
1
Cinx
X1 (Pin 1),
X2 (Pin 8)
16
pF



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